Atria Logic, Inc. IP Cores

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1201

20.0

IO 1.8V LVDS Automotive Grade 1 GF (22nm)

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1202

20.0

IO 1.8V LVDS in GF (22nm)

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1203

20.0

IO 1.8V LVDS Rx in GF (12nm)

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1204

20.0

IO 3.3V eMMC in GF (22nm)

Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

1205

20.0

IO 3.3V LVDS Rx Automotive Grade 2 in GF (12nm)

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1206

20.0

IO 3.3V LVDS Rx in GF (12nm)

Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...

1207

20.0

IO GPIO in TSMC for Automotive Grade 1 (22nm)

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1208

20.0

IO I2C 3.3V in GF (22nm)

Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...

1209

20.0

IO I3C 3.3V in GF (22nm)

Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

1210

20.0

IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols

The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a ...

1211

20.0

LPDDR4 multiPHY V2 in GF (22nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1212

20.0

LPDDR4 multiPHY V2 in Samsung (14nm, 11nm, 10nm, 8nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1213

20.0

LPDDR4 multiPHY V2 in TSMC (28nm, 22nm, 16nm, 12nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1214

20.0

LPDDR4/3, DDR4/3 Memory Controller IP

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

1215

20.0

LPDDR4X multiPHY in GF (14nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1216

20.0

LPDDR4X multiPHY in Samsung (14nm, 11nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1217

20.0

LPDDR4X multiPHY in TSMC (16nm, 12nm,N7, N6)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1218

20.0

LPDDR4X multiPHY Plus in GF (12nm)

The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...

1219

20.0

LPDDR4x/4 PHY IP for 22nm

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

1220

20.0

LPDDR5/4/4X PHY in GF (12nm)

The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package a...

1221

20.0

LPDDR5/4/4X PHY in TSMC (16nm, 12nm, N7, N6, N5)

The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package a...

1222

20.0

LPDDR5/4x/4 combo PHY on 14nm, 12nm

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

1223

20.0

LPDDR5X/5/4X PHY in Samsung (8nm, SF4X, SF2)

The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...

1224

20.0

LPDDR5X/5/4X/4 combo PHY at 12nm

The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...

1225

20.0

LPDDR5X/5/4X/4 combo PHY at 7nm

OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

1226

20.0

LPDDR5X/5/4X/4 PHY for 16nm

The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...

1227

20.0

LPDDR5X/5/4X/4 PHY IP for 12nm

The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...

1228

20.0

GPIO 1.8V Automotive Grade 1 in GF (22nm)

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1229

20.0

GPIO 1.8V FS Automotive Grade 1 in GF (22nm)

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1230

20.0

Arasan xSPI + eMMC Combo PHY IP

This IP integrates both xSPI (Expanded Serial Peripheral Interface) and eMMC 5.1 PHY (Physical Layer) into a single unified solution, enabling support...

1231

20.0

Pre-verified Interface IP Subsystems reduce design risk and accelerate time-to-market

Customers are increasingly utilizing third-party standards-based IP in their designs, but face several challenges. With more IP and more complex inter...

1232

20.0

Front-end voice processing software package providing enhanced speech intelligibility for voice-enabled devices

ClearVox is a software suite of advanced voice input processing algorithms aimed to enhance voice clarity in any voice-enabled device. Voice has be...

1233

20.0

USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)

The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...

1234

20.0

DSC Decoder

Display Stream Compression (DSC) standard was announced by Video Electronics Standards Association (VESA) in 2014 for video data compression and has b...

1235

20.0

DSC Encoder

Display Stream Compression (DSC) standard was announced by Video Electronics Standards Association (VESA) in 2014 for video data compression and has b...

1236

20.0

TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries

Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1237

20.0

TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks

Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1238

20.0

TSMC 4nm (N4P) 1.2V/1.8V I3C Libraries

Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

1239

20.0

TSMC 4nm (N4P) 1.2V/1.8V/2.5V Failsafe GPIO Libraries

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1240

20.0

TSMC 4nm (N4P) 1.8V SD/eMMC IO

Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

1241

20.0

TSMC 4nm (N4P) 1.8V SD/eMMC PHY

Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...

1242

20.0

TSMC 4nm (N4P) 2.5V Basekit Libraries

Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1243

20.0

TSMC 4nm (N4P) 2.5V Basekit Libraries, multiple metalstacks

Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...

1244

20.0

TSMC 5nm (N5) 1.2V/1.8V Basekit Libraries

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1245

20.0

TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1246

20.0

TSMC 5nm (N5) 1.2V/1.8V Failsafe GPIO Libraries, multiple metalstacks

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1247

20.0

TSMC 5nm (N5) 1.2V/1.8V I3C Libraries

Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...

1248

20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V Failsafe GPIO Libraries

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1249

20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

1250

20.0

TSMC 5nm (N5) 1.2V/1.8V/2.5V GPIO Libraries, multiple metalstacks

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...

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