Design & Reuse
6105 IP
251
0.118
Self-contained ring oscillator, frequency 32KHz. VCC11A=1.08V~1.32V; UMC 55nm LP/RVT Low-K Logic process
Self-contained ring oscillator, frequency 32KHz. VCC11A=1.08V~1.32V; UMC 55nm LP/RVT Low-K Logic process...
252
0.118
General Purpose IO IP, 3.3V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process Generic 3.3V Tolerant IO cells....
253
0.118
General Purpose IO IP, 3.3V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 3.3V tolerance standard IO Cell Library....
254
0.118
General Purpose IO IP, 5V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 5V tolerance standard IO Cell Library....
255
0.118
General Purpose IO IP, 5V tolerance, UMC 0.25um Logic process
UMC 0.25um Logic process 5V tolerance standard IO Cell Library....
256
0.118
General Purpose IO IP, 5V tolerance, UMC 0.35um Logic process
UMC 0.35um Logic process 5V tolerance standard IO Cell Library....
257
0.118
General Purpose IO IP, 5V tolerance, UMC 0.35um Logic process
UMC 0.35um Logic process 3.3V with 5V tolerance Generic IO....
258
0.118
General Purpose IO IP, 5V tolerance, UMC 0.45um Logic process
UMC 0.45um Logic process 5V tolerance low voltage gate array IO Cell Library....
259
0.118
General Purpose IO IP, 5V tolerance, UMC 0.5um Logic process
UMC 0.5um Logic process 5V tolerance low voltage IO Cell Library....
260
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 2.5V standard IO Cell Library....
261
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 3.3V standard IO Cell Library....
262
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 2.5V standard IO Cell Library....
263
0.118
General Purpose IO IP, UMC 0.25um Logic process
UMC 0.25um Logic process true 3.3V standard IO Cell Library....
264
0.118
General Purpose IO IP, UMC 0.35um Logic process
UMC 0.35um Logic process true 3.3V Generic IO....
265
0.118
General Purpose IO IP, UMC 0.35um Logic process
UMC 0.35um Logic process true 3.3V standard IO Cell Library....
266
0.118
General Purpose IO IP, UMC 0.35um Logic process
UMC 0.35um Logic process true 5V Generic IO....
267
0.118
General Purpose IO IP, UMC 0.35um Logic process
UMC 0.35um Logic process true 5V standard IO Cell Library....
268
0.118
General Purpose IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process true 5V standard gate array IO Cell Library....
269
0.118
General Purpose IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process true 3.3V low voltage gate array IO Cell Library....
270
0.118
General Purpose IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process true 3.3V standard gate array IO Cell Library....
271
0.118
General Purpose IO IP, UMC 0.45um Logic process
UMC 0.45um Logic process true 5V low voltage gate array IO Cell Library....
272
0.118
General Purpose IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 3.3V standard IO Cell Library....
273
0.118
General Purpose IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 5V standard IO Cell Library....
274
0.118
General Purpose IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 3.3V low voltage IO Cell Library....
275
0.118
General Purpose IO IP, UMC 0.5um Logic process
UMC 0.5um Logic process true 5V low voltage IO Cell Library....
276
0.118
General Purpose IO IP, UMC 90nm Logic process
UMC 90nm 2.5V over-drive 3.3V GOX52 process IO....
277
0.118
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process...
278
0.118
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process...
279
0.118
The bias block only for FXLVDSRX080HH0L, UMC 40nm LP/RVT LowK Logic Process
The bias block only for FXLVDSRX080HH0L, UMC 40nm LP/RVT LowK Logic Process...
280
0.118
The bias block only for FXLVRX050HH0L, UMC 40nm LP/RVT LowK Logic Process
The bias block only for FXLVRX050HH0L, UMC 40nm LP/RVT LowK Logic Process...
281
0.118
The bias block only for FXLVRX080HF0F, UMC 55nm eflash/RVT LowK Logic Process
The bias block only for FXLVRX080HF0F, UMC 55nm eflash/RVT LowK Logic Process...
282
0.118
The bias block only for FXLVRX080HF0L, UMC 55nm LP/RVT LowK Logic Process
The bias block only for FXLVRX080HF0L, UMC 55nm LP/RVT LowK Logic Process...
283
0.118
This IP for DDR4, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL; UMC 40nm LP Logic Process
This IP for DDR4, Input 200MHz - 800MHz, output clock_1X 200MHz - 800MHz, output clock_2X 400MHz - 1600MHz, output,frequency synthesizable PLL; UMC 40...
284
0.118
High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counter, and two 16-bit dptr; UMC 0.18um logic GII process.
High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counter, and two 16-bit dptr; UMC 0.18um logic GII process...
285
0.118
High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process.
High performance 8-bit micro-controller with 256 bytes on-chip Data RAM, three 16-bit timer/counters, and two 16-bit dptr; 0.25um UMC Logic process....
286
0.118
Linear Regulator IP, Output: 1.8V/120mA, UMC 0.153um Logic process
3.3V to 1.8V with 120mA driving capability, VBG=0.615V, Linear Regulator, UMC 0.153um Logic process....
287
0.118
Linear Regulator IP, Output: 1.8V/150mA, UMC 0.162um Logic process
3.3V to 1.8V LDO regulator with 150mA driving.Iq=66uA, UMC 0.162um Logic process....
288
0.118
Linear Regulator IP, Output: 5V/70mA, UMC 0.35um Logic process
5V with 70mA driving capability, Istb=120uA Linear Regulator, 0.35um Logic process....
289
0.118
Ring Oscillator IP, Output: 12KHz, UMC 90nm Logic process
12KHz Ring OSC....
290
0.118
Single Port SRAM Compiler IP, UMC 0.25um Logic process
UMC 0.25um Logic process synchronous high speed Single Port SRAM memory compiler....
291
0.118
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process...
292
0.118
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI DPHY Reciever 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...
293
0.118
MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process
MIPI Receiver 80Mbps-1Gbps; 40nm LP LowK Logic Process...
294
0.118
MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process
MIPI Receiver,DPHY RX V1.2; UMC 28nm HPC Logic and Mixed-Mode Process...
295
0.118
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process...
296
0.118
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~1.5Gbps ; UMC 28nm HPC Logic Process...
297
0.118
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...
298
0.118
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process
MIPI Transmitter 80Mbps~2.5Gbps ; UMC 28nm HPC Logic Process...
299
0.118
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process
MIPI Transmitter 80~1500MHz combo with CMOS input using MIFS C40LP Logic Process...
300
0.118
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process
DLL-based cell that generates 32 phase delay for FTSDC021; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...