101 1.0

12-Bit SAR ADC in GlobalFoundries 22nm FDSOI This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes intern...

102 1.0

12-Bit SAR ADC in GlobalFoundries 22nm FDSOI This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes intern...

103 1.0

32:1 serializer followed by sub-LVDS drivers The CCP2 transmitter consists of a 32:1 serializer followed by LVDS drivers for transmitting clock (or strobe) and data. The LVDS drivers operate in s...

104 1.0

I2C Master and Slave I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for app...

105 1.0

650M LVDS transmitter, 5 channel The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...

106 1.0

Samsung 28nm FDSOI 1.8v/1.0v APLL ...

107 1.0

Samsung 28nm FDSOI 1.8v/1.0v APLL This IP is a programmable Analog PLL suitable for high speed clock generation. The high speed VCO can run from 800MHz to 3200MHz. By setting DM [3:0] ...

108 1.0

Samsung 28nm FDSOI 1.8v/1.0v LVDS Transmitter ...

109 1.0

Samsung 28nm FDSOI 1.8v/1.0v sub-LVDS Receiver ...

110 1.0

Samsung 28nm FDSOI Codec The SEC28FDSOI18_CODEC_04 integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver amplifier, and audio PL...

111 1.0

Samsung 28nm FDSOI MIPI DPHY V1.1 ...

112 1.0

SAMSUNG 28nm FDSOI USB2.0 Dual Role PHY/OTG PHY The USB 2.0 OTG PHY is a Hi-Speed USB peripheral transceiver IP that implements the Intel® UTMI standard. It provides a High/Full-Speed USB analog fro...

113 1.0

Samsung 28nm FDSOI USB3.0 and PCIE2 combo PHY The USB3.0 Super-Speed / PCI Express Combo PHY is a programmable IP that is compatible with the PHY Interface for PCI Express and USB3.0 Super-Speed A...

114 1.0

Samsung 28nm FDSOI USB3.0 Type-C PHY ...

115 1.0

Samsung 28nm Low Power Single-Port SRAM Compiler VeriSilicon Samsung 28FDSOI Low Power Synchronous Single-Port SRAM compiler optimized for Samsung FDSOI 28nm process can flexibly generate memory bloc...

116 1.0

Samsung 28nm Low Voltage Single-Port SRAM Compiler VeriSilicon Samsung 28FDSOI Low Voltage Synchronous Single-Port SRAM compiler optimized for Samsung FDSOI 28nm process can flexibly generate memory bl...

117 1.0

IBM 10SF 65nm 2.5v PLL Designed for audio clock generation, this PLL integrates a phase frequency detector (PFD), a loop filter (LP), a voltage control oscillator (VCO), a c...

118 1.0

IBM 10SF 65nm 2.5v PLL This PLL is designed for audio clock generation. The reference clock is 12MHz, 13.5MHz or 19.2MHz, which can be either from crystal OSC or from intern...

119 1.0

IBM 65nm 1.0/2.5V 32768Hz Crystal Oscillator This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...

120 1.0

IBM 65nm 10SF Process 24-Bit Stereo Sigma-Delta ADC/DAC The I65GV25_CODEC_04 integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver amplifier, and audio PLL to ...

121 1.0

IBM 65nm 12-bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes intern...

122 1.0

IBM 65nm 12-Bit 8-Input 1M/200k SAR ADC This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core intern...

123 1.0

IBM 65nm 12-Bit 8-Input 1M/200k SAR ADC This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution. The IP includes a core intern...

124 1.0

IBM 65nm 12Bit 1M/200K Single/Differential 2.5v Rail to Rail SAR ADC This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution. The ADC includes intern...

125 1.0

IBM 65nm 2.5/1.2V This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...

126 1.0

IBM 65nm 2.5/1.2V 32768Hz Crystal Oscillator This is a 32768Hz crystal oscillator specifically designed for ultra-low power application. The sole power supply is 3.3V, but it can be as low as 1.6...

127 1.0

IBM 65nm 24-bit Stereo Sigma-Delta ADC The I65GV25_ADC_01 specifies the design of a high-performance 24-bit stereo Audio ADC for portable digital audio systems. The ADC within the specifica...

128 1.0

IBM 65nm 24bit Sigma-Delta DAC The I65GV25_DAC_01 specifies the design of a high-performance 24-bit stereo Audio DAC for portable digital audio systems. The DAC within the specifica...

129 1.0

IBM 65nm 3.3v-1.0v Power Regulator This IP is a 3.3V to 1.0V power regulator in IBM 65nm 1.0V/2.5V process. It supports a large Vdd range (1.62V~3.6V) and a large output capacitance ran...

130 1.0

IBM 65nm Analog 2-1 MUX This analog 2-1 MUX is designed for low speed application....

131 1.0

IBM 65nm Analog 2-1 MUX This analog 2-1 MUX is designed for low speed application....

132 1.0

IBM 65nm CMOS 1-Channel 10-Bit 350Msps+ Current-Steering D/A Converter This IP specifies a 1-channel 10-bit resolution, high performance, low power CMOS digital-to-analog converter (DAC) which offers exceptional direct cu...

133 1.0

IBM 65nm CMOS 3-channel 10-Bit 240Msps+ Current-Steering D/A Converter The I65V25_DAC_06 is a 3-channel 10-bit resolution, high performance, low power, current-steering CMOS digital-to-analog converter (DAC). The input up...

134 1.0

IBM 65nm CMOS 3-Channel 10-Bit 350Msps+ Current-Steering D/A Converter This IP specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which offers exceptional direct cu...

135 1.0

IBM 65nm Low Leakage Process 24 Bit Stereo Sigma-Delta ADC/DAC The I65LPEV25_CODEC_04B integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier, and audio PLL to...

136 1.0

IBM 65nm Low Leakage Process 24 Bit Stereo Sigma-Delta ADC/DAC The I65LPEV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier, and audio PLL to ...

137 1.0

IBM 65nm LPE 1.2V The present IP is a Voltage Detector (VDT) circuit. The IP detects the voltage level of input voltage, VIN12, of which the normal operating range is 1...

138 1.0

IBM 65nm LPE 1.2V<->3.3V Level Shifter IBM 65nm LPE 1.2V3.3V Level Shifter Library...

139 1.0

IBM 65nm LPE 1.2V<->3.3V Level Shifter IBM 65nm LPE 1.2V3.3V Level Shifter Library...

140 1.0

IBM 65nm LPE 2.5V/1.2V The present Power-On-Reset circuit generates system reset pulses (RST) when both the 2.5V and 1.2V power suppliers are turned on. Output signal RST12 ...

141 1.0

IBM 65nm LPe 24M Crystal Oscillator This is a crystal oscillator specifically designed for low power application. It is configurable to suit for 2M~32MHz crystals working at fundamental ...

142 1.0

IBM 65nm LPE 3.3V The present Power-On-Reset circuit generates system reset pulses (RST) when the 3.3V power supplier is turned on. The output signal RST33 is positive ...

143 1.0

IBM 65nm LPE 3.3V Standard Cell IBM 65nm LPE 3.3V Standard Cell Library...

144 1.0

IBM 65nm LPE 3.3V/1.2V Power On Reset The present Power-On-Reset circuit generates system reset pulses (RST) when both the 3.3V and 1.2V power suppliers are turned on. The output signals R...

145 1.0

IBM 65nm LPE Process 10Bit 2-Channel 40MHz ADC The VeriSilicon I65LPEV25_ADC_06 IP is a 2.5V 10Bit 40MHz pipeline analog to digital converter capable of running at up to 80MHz conversion rate in on...

146 1.0

IBM 65nm LVDS Receiver The LVDS Receiver converts up to 10 pairs of LVDS data streams into 70-bit of CMOS data and then feeds the data to the logic core that can support Sin...

147 1.0

IBM 65nm LVDS Transmitter The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...

148 1.0

IBM 65nm LVDS Transmitter The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream. A phase-locked transmit clock is transmitted in parallel with the data stream ...

149 1.0

IBM 65nm Mini-LVDS Transmitter The Mini-LVDS transmitter converts up to 64-bit CMOS data into 16-pairs of Mini-LVDS data stream that can support Single-Link transmission with up to ...

150 1.0

IBM 65nm SF 1.0V Voltage Detector The present IP is a Voltage Detector (VDT) circuit. The IP detects the voltage level of input voltage, VIN1P0, of which the normal operating range is ...