Design & Reuse
1288 IP
1051
0.0
MMC Target Controller
A compact low power and scalable IP core which provides a simple, firmware-friendly cost-effective Physical Link interface for MultiMediaCard-based m...
1052
0.0
DMNA V2 Encoder/Decoder (SW)
DMNA-V2 is TMC s original video CODEC (encoder & decoder) software. Comparing with H.264, DMNA-V2 has higher and suitable compression efficiency for t...
1053
0.0
AMR Encoder/Decoder
TMC’s AMR(Adaptive Multi Rate) Speech Encoder is designed to be compliant with 3GPP(The 3rd Generation Partnership Project), and has the feature...
1054
0.0
Interface Controller - PHY IP
The UCIE PHY IP is a market leading, extremely low-power, low-latency interface IP for very high bandwidth connections between two dies that are on th...
1055
0.0
Color Filter Software Core
TMC developed Color Filter software for improving video quality on potable devices. Color Filter processed on decoding stream makes foggy picture of...
1056
0.0
Comprehensive, High Throughput Pixel Operation IP
The PC820 pixel processor is an IP which provides pixel processing functions such as cropping, color space conversion (CSC), alpha blending, 3D LUT, a...
1057
0.0
Lossless JPEG Codec Full HD(YUV422) 24fps@100MHz. (1Sample/clk)
KJN-1LSC conform to the Lossless JPEG format(ITU-T T.81 Annex H) and compress/decompress image data without data loss in comparison to normal lossy JP...
1058
0.0
LPDDR4/DDR4/DDR3 PHY - TSMC 22nmULL
SP-LPD4/D43_PHY16BIT-T22ULL is designed for DRAM controller to connect to the LPDDR4/DDR4/3 DRAM memory device. It contains a DDR PHY Control Unit(DPC...
1059
0.0
JPEG Codec 4K(YUV422) 96fps@200MHz,
The KJN-7EX_LSC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produ...
1060
0.0
JPEG Codec Full HD(YUV422) 30fps@126MHz(1Sample/clk)
The KJN-F1 conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA....
1061
0.0
JPEG Decoder 8K(YUV422) 48fps@200MHz, (16Sample/clk)
The KJN-8EX_DEC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produc...
1062
0.0
JPEG Decoder Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4DEC conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA. This produ...
1063
0.0
JPEG Encoder 4K(YUV422) 48fps@200MHz. (4Sample/clk)
The KJN-6ENC conform to the JPEG baseline format for compressing still images. This product has encoder-only functions....
1064
0.0
JPEG Encoder 8K (YUV422) 96fps@200MHz. (32Sample/clk)
The KJN-9EX_ENC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produc...
1065
0.0
JPEG Encoder 8K(YUV422) 48fps@200MHz. (16Sample/clk)
The KJN-8EX_ENC conform to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images. This produc...
1066
0.0
JPEG Encoder Full HD(YUV422) 24fps@100MHz. (1Sample/clk)
The KJN-1ENC conform to the JPEG baseline format for compressing still images. This product has encoder-only functions....
1067
0.0
JPEG Encoder Full HD(YUV422) 30fps@126MHz(1Sample/clk)
The KJN-F1ENC conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA. This produ...
1068
0.0
JPEG Encoder Full HD(YUV422) 30fps@63MHz. (2Sample/clk)
The KJN-F4ENC conform to the JPEG baseline format for compressing/decompressing still images. The F series is a product optimized for FPGA. This produ...
1069
0.0
JPEG Encoder Full HD(YUV422) 48fps@100MHz. (2Sample/clk)
The KJN-4ENC conform to the JPEG baseline format for compressing/decompressing still images. This product has encoder-only functions....
1070
0.0
JPEG Encoder/Decoder
Baseline JPEG encoder/decoder described in RTL compliant with ISO/IEC 10918-1. High speed processing with low clock frequency.Suitable for digital sti...
1071
0.0
MPEG4 SP SD Encoder/Decoder SW
TMC s MPEG4 video codec (encoder&decoder) software is designed to be compliant with MPEG4 Visual (high-efficiency image compression standard standardi...
1072
0.0
Frame Rate Converter
TMC developed FRC ( Frame Rate Converter) software interfacing with YUV video format. FRC software generates new frames after decoding stream regardle...
1073
0.0
USB3.2 PHY on Samsung S8LPU
This IP is a USB 3.2 Gen2x2 PHY IP which provides a complete range of USB 3.2 Gen2 host and peripheral applications up to 20Gbps. The USB 3.2 Gen2x2 I...
1074
0.0
USB3.2 PHY on Samsung SF4X
This IP is a USB 3.2 Gen2x2 PHY IP which provides a complete range of USB 3.2 Gen2 host and peripheral applications up to 20Gbps. The USB 3.2 Gen2x2 I...
1075
0.0
ASICS World Services, LTD. - SoC Design Services
We provide a wide variety of services, including: Design SpecificationHDL CodingVerificationSynthesisFPGA PrototypingComplete PrototypesSystem Protot...
1076
0.0
ZSP-USB-JTAG Emulator
The ZSP-USB-JTAG emulator probe enables efficient and productive embedded software debugging. This compact and portable probe is powered by the USB po...
1077
0.0
ATA-7 (UDMA 133) Host controller
A ATA-7 compliant host controller core to interface to ATA devices like hard-disks, CD and DVD drives. This core is targeted for SOC implementations i...
1078
0.0
ATA-7 (UDMA 133) Target Interface
This is a ATA-7 compliant device interface core used for interfacing custom devices to IDE controller. Core is targeted for SOC implementations in ASI...
1079
0.0
XuanTie C908
XuanTie C908 is the latest RISC-V processor of the XuanTie series launched by T-Head Semiconductor. It has adopted the RV64GCB[V] instruction and is c...
1080
0.0
eUSB2 PHY on Samsung SF4X
The Embedded USB 2.0 PHY is a High speed System-on-Chip (SoC) integrated transceiver IP in advanced process that implements the Intel® UTMI standard. ...
1081
0.0
ZView IDE - ZSP Development Environment
The ZView Integrated Development Environment (IDE) features a debugger as part of the Eclipse software development environment. Eclipse is an open, in...
1082
0.0
1x32 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm SiGe BiCMOS 1.8V/3.3V Process
The ATO0001X32TS180SGE3NA is organized as 1 by 32 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.18um SiGe Bi...
1083
0.0
1x64 Bits OTP (One-Time Programmable) IP, TSM- 0.18μm Mixed-Signal 1.8V/3.3V Process
The AT1X64T180MM0AB is organized as one by 64 bits one-time programmable (OTP). This is a kind of non-volatile memory fabricated in TSM- Mixed-Signal ...
1084
25.0
MIPI CSI2 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.1 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
1085
25.0
MIPI CSI2 v1.3 Transmit Controller
The Veriest Solutions MIPI CSI-2 v1.3 Transmit Controller facilitates transmission over a standard high-speed unidirectional serial interface between ...
1086
25.0
Flash SPI controller master/slave
Veriest's SPI Master Controller IP provides an industry standard data communication channel between the AMBA APB and SPI buses. It supports SPI master...
1087
25.0
Quad-SPI FLASH Controller AHB
The Veriest Serial Flash Controller Design IP offers a rich set of features to facilitate easy access to Serial Flash devices. The CPU can boot direc...
1088
20.0
112Gbps SerDes
With sophisticated architecture and advanced technology, KNL 112Gbps SerDes lP with PMA and PCS layer is designed for low power and high performance a...
1089
20.0
64G SerDes
The KNiulink 64G SerDes IP core supports PAM4 signaling in the range of 25.0 - 64.0 Gbps using full-rate and half-rate modes with scrambled data. Non-...
1090
20.0
Combo SerDes PHY
With sophisticated architecture and advanced technology, KNiulink multi-mode transceiver IP with PMA and PCS layer is designed for low power and high ...
1091
15.0
PCIe 5.0 PHY
With sophisticated architecture and advanced technology, KNiulink SerDes PHY IP with PMA and PCS layer is designed for low power and high performance ...
1092
0.0
AES Engine IP
YEESTOR s AES engine (ESAES) IP is a high-performance cryptographic engine operates in AES (Rijndael) NIST Federal information processing standard FIP...
1093
10.0
PCIe 4.0 PHY
With sophisticated architecture and advanced technology, KNiulink SerDes PHY IP with PMA and PCS layer is designed for low power and high performance ...
1094
8.0
PCIe 3.0/2.0 PHY
With sophisticated architecture and advanced technology, KNiulink PCIE GEN3/GEN2 PHY IP with PMA and PCS layer is designed for low power and high perf...
1095
7.0
JESD204B /204C PHY&MAC
With sophisticated architecture and advanced technology, JESD204B /204C IP with PHY and MAC layer is designed for low power and high performance appli...
1096
6.0
RapidIO PHY
RapidIO is a high performance, low pin count, packet switched, full duplex, system level interconnect architecture. The architecture addresses the nee...
1097
5.0
SATA/SAS 3.0 PHY
With sophisticated architecture and advanced technology, KNiulink SATA/SAS transceiver IP with PMA and PCS layer is designed for low power and high pe...
1098
5.0
DDR3/4 and LPDDR2/3/4/4x Combo PHY&MAC
With sophisticated architecture and advanced technology, this DDR3/4 and LPDDR2/3/4/4x IP combo solution with high performance and low power. In 12~28...
1099
4.0
DDR3/DDR4 IP solution with high performance and low power
With sophisticated architecture and advanced technology, KNiulink provide DDR3/DDR4 IP solution with high performance and low power. KNiulink could o...
1100
4.0
USB3.1 PHY
With sophisticated architecture and advanced technology, KNiulink USB3.1 transceiver IP with PMA and PCS layer is designed for low power and high perf...