Design & Reuse
Catalog of SIP Cores
System on Chip design resources
3941 IP
1601
0.118
DDR DLL IP, Input: 66MHz - 133MHz, Output: 66MHz - 133MHz, UMC 0.13um HS/FSG process
Input 66M-133MHz, output 66M-133MHz, DDR DLL, UMC 0.13um HS/FSG Logic process....
1602
0.118
DDR DLL IP, Input: 66MHz - 200MHz, Output: 66MHz - 200MHz, UMC 90nm SP process
Input 66M-200MHz, output 66M-200MHz, DDR DLL, UMC 90nm SP/RVT Low-K Logic process....
1603
0.118
DDR DLL IP, Input: 80MHz - 320MHz, Output: 6.25%-50% Delay, UMC 55nm SP process
Input 80-320MHz, output 6.25%~50% delay, 80-320MHz, DDR2 DLL, UMC 55nm SP/RVT Low-K Logic process....
1604
0.118
DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process
DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...
1605
0.118
DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process
DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...
1606
0.118
DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process
DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process...
1607
0.118
DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process
DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process...
1608
0.118
DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process
DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process...
1609
0.118
DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process
DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process...
1610
0.118
DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process
DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process...
1611
0.118
DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process
DDR2 PHY Data Block ;UMC 0.13um Logic HS/FSG Process...
1612
0.118
DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process
DDR2-PHY command/address block for DRAM chip, BOAC ; UMC 90nm SP/RVT Low-K Logic Process...
1613
0.118
DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY Command/Address block; UMC 90nm SP/RVT Lowk Process...
1614
0.118
DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process
DDR2-PHY compensation block, BOAC; UMC 0.13um HS/FSG process...
1615
0.118
DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process
DDR2-PHY compensation block, BOAC; UMC 90nm SP/RVT Low-K Logic process...
1616
0.118
DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process
DDR2-PHY data block with BOAC IO; UMC 90nm SP/RVT Lowk Logic Process...
1617
0.118
DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process
DDR2-PHY data block; UMC 90nm SP/RVT Lowk Process...
1618
0.118
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process...
1619
0.118
DDR2/3 COMBO Compensation block (2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Porcess
DDR2/3 COMBO Compensation block (2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Porcess...
1620
0.118
DDR2/3 Controller IP, DDR2/3 controller with DFI 2.1 interfaces, Support DDR1/DDR2/DDR3 SDRAM, Soft IP
DDR2/3 Combo SDRAM Controller....
1621
0.118
DDR2/3 PHY Combo PHY data block (1.0v SP & 2.5V device); UMC 90nm SP/RVT LowK Logic Process
DDR2/3 PHY Combo PHY data block (1.0v SP & 2.5V device); UMC 90nm SP/RVT LowK Logic Process...
1622
0.118
DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process
DDR2/DDR1/MDDR Combo Command/Address Block ; UMC 65nm LP/RVT LowK Logic Process...
1623
0.118
DDR2/DDR1/MDDR Combo Data Block ; UMC 65nm LP/RVT LowK Logic Process
DDR2/DDR1/MDDR Combo Data Block ; UMC 65nm LP/RVT LowK Logic Process...
1624
0.118
DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process
DDR2/MDDR Combo Command/Address Block ; UMC 0.13um HS/FSG Logic Process...
1625
0.118
DDR2/MDDR Combo Data Block ; 0.13um Logic HS/FSG Logic Process
DDR2/MDDR Combo Data Block ; 0.13um Logic HS/FSG Logic Process...
1626
0.118
DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device
DDR2/MDDR Combo PHY CMD ADDR block ; UMC 55nm SP/RVT Lowk Process with 2.5V device...
1627
0.118
DDR2/MDDR Combo PHY data block ; UMC 55nm SP process with 2.5V device
DDR2/MDDR Combo PHY data block ; UMC 55nm SP process with 2.5V device...
1628
0.118
DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process
DDR2/MDDR COMBO PHY Data block for Chip usage ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...
1629
0.118
DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process
DDR2/MDDR Combo PHY for Chip load usage ; UMC 65NM SP-RVT with 2.5V device LowK Logic Process...
1630
0.118
DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process
DDR2/MDDR PHY CMD/ADDR BLOCK ; UMC 65nm 1.0V process with 2.5V device SP/RVT Lowk Logic Process...
1631
0.118
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage ; UMC 65nm 1.0V with 2.5V Device SP/RVT LowK Logic Process...
1632
0.118
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process
DDR2/MDDR PHY CMD/ADDR BLOCK for DIMM usage; UMC 55nm 1.0V with 2.5V device SP/RVT LowK Logic Process...
1633
0.118
DDR2/MDDR PHY Data block ; UMC 65nm 1.0V with 2.5V device SP/RVT LowK Logic Process
DDR2/MDDR PHY Data block ; UMC 65nm 1.0V with 2.5V device SP/RVT LowK Logic Process...
1634
0.118
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device...
1635
0.118
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device for 2 layer PCB board usage
DDR23 COMBO PHY CMD/ADDR BLOCK ; UMC 40LP/RVT LowK Logic Process with 2.5V device for 2 layer PCB board usage...
1636
0.118
DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY compensation Block ; UMC 40LP/RVT LowK Logic Process with 2.5V device...
1637
0.118
DDR23 COMBO PHY Data Block ; UMC 40nm LP/RVT LowK Logic Process with 2.5V device
DDR23 COMBO PHY Data Block ; UMC 40nm LP/RVT LowK Logic Process with 2.5V device...
1638
0.118
DDR23 COMBO PHY Data Block ; UMC 40nm LP/RVT LowK Logic Process with 2.5V device (16Bit)
DDR23 COMBO PHY Data Block ; UMC 40nm LP/RVT LowK Logic Process with 2.5V device (16Bit)...
1639
0.118
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process...
1640
0.118
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process...
1641
0.118
DDR3 Combo PHY Compensation Block for solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY Compensation Block for solder bump application; UMC 40nm LP/RVT Logic Process...
1642
0.118
DDR3 Combo PHY Data Block for solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY Data Block for solder bump application; UMC 40nm LP/RVT Logic Process...
1643
0.118
DDR3 RTL Digitalize PHY AC block; UMC 28nm HPC/RVT Logic Process using FSJ0C_ARS
DDR3 RTL Digitalize PHY AC block; UMC 28nm HPC/RVT Logic Process using FSJ0C_ARS...
1644
0.118
DDR3 RTL Digitalize PHY DATA block; UMC 28nm HPC/RVT Logic Process using FSJ0C_ARS
DDR3 RTL Digitalize PHY DATA block; UMC 28nm HPC/RVT Logic Process using FSJ0C_ARS...
1645
0.118
DDR3 RTL PHY Address Command module
DDR3 RTL PHY Address Command module...
1646
0.118
DDR3 RTL PHY data module
DDR3 RTL PHY data module...
1647
0.118
DDR3/2 COMBO PHY CMD/ADDR BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR3/2 COMBO PHY CMD/ADDR BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device...
1648
0.118
DDR3/2 COMBO PHY DATA BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device
DDR3/2 COMBO PHY DATA BLOCK for 2 layer 8 bits DDR3 PCB ; UMC 40LP/RVT LowK Logic Process with 2.5V device...
1649
0.118
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), command / address block,UMC 40nm LP/RVT LowK Logic Process.
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), command / address block,UMC 40nm LP/RVT LowK Logic Process....
1650
0.118
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), data block;UMC 40nm LP/RVT LowK Logic Process .
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), data block;UMC 40nm LP/RVT LowK Logic Process ....