Design & Reuse
5809 IP
1951
4.0
Gen-Z Physical Layer for PCIe IP Core
The IntelliProp IPC-GZ197A-ZM Gen-Z Physical Layer for PCIe is an IP Core that allows companies to attach a Gen-Z core to a PCIe Phy. The IPC-GZ197A-Z...
1952
4.0
Gen-Z Requester IP Core
The IntelliProp IPC-GZ190A-HI Gen-Z Requester is an IP Core that allows companies to build Gen-Z compliant Requester devices. The IPC-GZ190A-HI is com...
1953
4.0
Gen-Z Responder IP Core
The IntelliProp IPC-GZ189A-DT Gen-Z Responder is an IP Core that allows the building of Gen-Z compliant media devices. The IPC-GZ189A-DT is compliant ...
1954
4.0
Gen-Z Switch IP Core
The IntelliProp IPC-GZ201A-ZM Gen-Z Switch is an IP Core that allows companies to build Gen-Z compliant components. The IPC-GZ201A-ZM is compliant wit...
1955
4.0
AES Encryption Core with XTS
The IntelliProp IPC-BL120A-ZM is an AES-XTS Encryption Core supporting 128 or 256 bit encryption. The IPC-BL120A-ZM provides encryption/decryption bas...
1956
4.0
AES-CTR Encryption Core
The IntelliProp IPC-BL204A-ZM is an AES-CTR (Counter Mode) Encryption Core supporting 128 or 256 bit encryption. The IPC-BL204A-ZM provides encryption...
1957
4.0
AES-GCM Encryption Core
The IntelliProp IPC-BL193A-ZM is an AES-GCM (Galois Counter Mode) Encryption Core supporting 128 or 256 bit encryption. The IPC-BL193A-ZM provides enc...
1958
4.0
USB 3.0 Hub
...
1959
4.0
NVMe Host Accelerator
The IntelliProp IPC-NV164A-HI NVMe Host Accelerator IP Core provides a simplified, high-bandwidth interface to industry standard NVMe storage devices....
1960
4.0
NVMe Target IP Core
The IntelliProp IPC-NV163A-DT NVMe Target IP core allows companies to build high speed NVMe based storage products. The IPC-NV163A-DT provides a hardw...
1961
4.0
NVMe-to-NVMe Bridge
The IntelliProp IPC-NV171B-BR NVMe Bridge utilizes the IntelliProp NVMe Host Accelerator Core and the IntelliProp NVMe Target Core to create an NVMe p...
1962
4.0
NVMe-to-SATA Bridge
The IntelliProp IPP-NV186A-BR is an NVMe-to-SATA Bridge that utilizes the IntelliProp NVMe Target IP Core and the IntelliProp SATA AHCI Host Core to c...
1963
3.0
100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
The RS100-160 core implements the codec for the Forward Error Correction (FEC) cyclic code RS(528, 514, 7,10) used in the IEEE 802.3bj (100G Backplane...
1964
3.0
802.11i CCM (CTR+CBC) AES Core for WiFi WLAN
Implementation of the new WLAN security standard 802.11i requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and me...
1965
3.0
802.11i CCMP/TKIP IP Core
Implementation of the WLAN security standard (802.11i) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and mess...
1966
3.0
802.15.3 CCM AES Core
Implementation of the new WPAN security standard (802.15.3) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and...
1967
3.0
1024 Point FFT
The FFT1024 core implements 1024 or 512 point FFT in hardware. It can be dynamically configured to process one 1024 or two simultaneous 512 point FFT/...
1968
3.0
P1619/802.1ae (MACSec) GCM/XEX/XTS-AES Core
General Description LAN security standard IEEE 802.1ae (MACSec) uses AES cipher in the GCM mode, while the disk/tape encryption standard IEEE P1619 us...
1969
3.0
32-512 Point Streaming FFT
The FFT1-32-512/4 core implements 32, 64, 128, 256, and 512 point FFT and IFFT in hardware that runs at the clock frequency four times higher than the...
1970
3.0
32/64/128/256/512/1024/2048/4096 Point FFT Core
The FFT4096 core the FFT and IFFT computations for N input samples, where N can be any power of 2 between 32 and 4096 (32, 64, 128,...…4096), in hardw...
1971
3.0
I2C Master / Slave Controller w/FIFO (AHB & AHB-Lite Bus)
The Digital Blocks DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AHB system Interconnect Fabric to an I2C Bus. The I2C is a t...
1972
3.0
I2C Master / Slave Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the APB system Interconnect Fabric to an I2C Bus. The I2C is a t...
1973
3.0
I2C Master Controller w/FIFO (APB Bus)
The Digital Blocks DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...
1974
3.0
I2C Slave Controller - Low Power, Low Noise Config of User Registers
The DB-I2C-S-SCL-CLK is an I2C Slave Controller IP Core focused on low power, low noise ASIC / ASSP designs requiring the configuration & control of r...
1975
3.0
I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)
The Digital Blocks DB-I2C-S-APB / DB-I2C-S-AHB / DB-I2C-S-AXI / DB-I2C-S-AVLN Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC,NIOS II or othe...
1976
3.0
I2C Slave with AHB Master Bridge (I2C2AHB)
The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
1977
3.0
I2C Slave with APB Master Bridge (I2C2APB)
The DB-I2C-S-APB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
1978
3.0
I2C Slave with AXI Master Bridge (I2C2AXI4)
The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring internal configuration & c...
1979
3.0
64 POINT FFT
The FFT0064 core implements 64 point FFT in hardware. FFT 64 works on blocks of 64 complex data samples....
1980
3.0
66/2112 Codec for Cyclic Code (2112,2080)
The CEC1-66/2112 core implements the codec for the Forward Error Correction (FEC) cyclic code (2112,2080) used in the IEEE 802.3ap (10G Backplane Ethe...
1981
3.0
Kasumi Encryption Core
The KSM1 core implements Kasumi encryption in compliance with the ETSI SAGE specification. It processes 64-bit blocks using 128-bit key. Basic core is...
1982
3.0
Fault Injection Studio
FortifyIQ’s Fault Injection Studio enables engineers to evaluate and strengthen hardware designs against fault injection attacks, e.g., DFA, SIFA, and...
1983
3.0
MBOA MAC AES Core
Implementation of the new WPAN security standard for MBOA MAC requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption ...
1984
3.0
RC4 Keystream Generator
The RC4 core implements the RC4 stream cipher in compliance with the ARC4 specification. It produces the keystream that consists of 8-bit words using ...
1985
3.0
Scalable RSA and Elliptic Curve Accelerator
Rivest-Shamir-Adelman (RSA) is a public-key cryptographic technology that uses the mathematics of so called “finite field exponentiation”. The operati...
1986
3.0
2D Graphics Hardware Accelerator (AXI4 Bus)
The DB9200AXI4 2D Graphics Engine Verilog IP Core targets low VLSI footprint, high-performance hardware accelerated graphics applications. The DB92...
1987
3.0
HDCP 2.0 Encryption Suite
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol. The hardware components are fully synchronous and availab...
1988
3.0
PDM to PCM Conversion, SMIC 65nmLL
The AR36S01 is a soft macro low-power digital microphone interface modulator IP. The IP converts stereo/mono 1-bit pulse-density modulated (PDM) bit s...
1989
3.0
IEEE 802.11 WAPI Encryption Core
Implementation of the new Chinese security standard (WAPI) requires running the SMS4 cipher in the WPI mode for encryption and message authentication....
1990
3.0
IEEE 802.15.4 (ZigBee) CCM* AES Cores
IEEE 802.15.4 is the low-power wireless standard that is used by ZigBee Alliance as a base of its ZigBee™ specification. The security design of IEEE 8...
1991
3.0
IEEE 802.16e (WiMAX) AES Core
Implementation of the new WLAN security standard (802.16e) requires the NIST standard AES cipher in CTR and CBC modes (a.k.a. CCM) for encryption and ...
1992
3.0
IEEE 802.1ae (MACsec) 100G Security Processor with Avalon-ST Interface
Implementation of the new LAN security standard IEEE 802.1ae (MACsec) requires the NIST standard AES cipher in the GCM mode for encryption and message...
1993
3.0
IEEE 802.1ae (MACsec) Security Processor
Implementation of the new LAN security standard IEEE 802.1ae (MACsec) requires the NIST standard AES cipher in the GCM mode for encryption and message...
1994
3.0
Generic CCM AES Core
The CCM1 cores are tuned for mid-performance generic AES-CCM applications per NIST SP 800-38C. Specific protocol implementations are available in inte...
1995
3.0
Generic CCM AES Core with CMAC Option
The CCM2 cores are tuned for mid-performance generic AES-CCM applications per NIST SP 800-38C. CCM2 core uses flow-trough design with dedicated input...
1996
3.0
SHA1, SHA2 Cryptographic Hash Cores
The SHA cores provide implementation of cryptographic hashes SHA-1 (core SHA1), SHA-2 (cores SHA2-256 and SHA2-512). The cores utilize “flow-through”...
1997
3.0
UHS-II PHY for SD4/SD5 TSMC 12nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
1998
3.0
UHS-II PHY for SD4/SD5 TSMC 16nm FF
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
1999
3.0
Side Channel Studio
FortifyIQ's FortifEDA Side-Channel Studio Analyzes leakage vulnerabilities throughout design flow by generating simulated power traces, performing st...
2000
3.0
High-Performance Lossless Compression Core
Lossless data compression is a class of data compression algorithms that allows the exact original data to be reconstructed from the compressed data. ...