Design & Reuse
5807 IP
251
3.0
Always-on Voice Activity Detection interfacing with analog microphones with embedded microphone bias in GF 22FDX
WT-a-HD-MC.03_GF_22_FDX is a mixed analog/digital Virtual Component (ViC) in GF 22FDX containing a Voice Activity Detection (VAD) engine for ultra low...
252
3.0
Analog to Digital Converter 8 Bit
The WEA8ADB45 is an 8-bit successive approximation Analog to Digital Converter. The converter consumes 9.17 mW from a 1.8 V supply during the conversi...
253
3.0
Analog to Digital Converter 8 Bit
The WEA8ADC18BICAL22G is an 8-bit Successive Approximation Analog to Digital Converter. It supports a rail-to-rail input voltage range. The WEA8ADC18B...
254
3.0
Complete measurement analog front end (AFE) IP for single phase power metering in TSMC 40uLPeF
METRO-PM-MFE-mono.11-HD-IVT_TSMC_40_uLPeF is a Mixed-signal (analog and digital) Virtual Component in TSMC 40uLPeF. It is comprised of a high resoluti...
255
3.0
Complete measurement analog front end (AFE) IP for three-phase power metering in SMIC 40LL-RF
METRO-PM-JADE-3P.11-HD_SMIC_40_LL-RF is a Mixed signal (analog and digital) Virtual Component in SMIC 40LL-RF which offers a complete analog front-end...
256
3.0
Complete measurement analog front end (AFE) IP for three-phase power metering in TSMC 40uLPeF
METRO-PM-JADE-3P.11-HD_TSMC_40_uLPeF is a Mixed-signal (analog and digital) Virtual Component in TSMC 40uLPeF. It is comprised of a high resolution Mi...
257
3.0
Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°) in TSMC 40uLP
iLR-Victoria-OV-LS-ref-2.7-5.5-0.55-3.3.03_TSMC_40_uLP is a Low-leakage LDO in TSMC 40uLP to supply logic and analog domains (up to 5.5V input supply)...
258
3.0
Low-leakage LDO for logic and analog domains supply up to 5.5 Vin - High temperature (Grade 1, Tj=150°) in TSMC 40uLPeF
iLR-Victoria-OV-LS-ref-2.7-5.5-0.55-3.3.03_TSMC_40_uLPeF is a Low-leakage LDO in TSMC 40uLPeF to supply logic and analog domains (up to 5.5V input sup...
259
3.0
Low-leakage LDO to supply logic and analog domains (up to 3.63V input supply) in TSMC 22ULL
iLR-Victoria-ref-1.62-3.63-1.8-2.5.03_TSMC_22_ULL is a Low-leakage LDO in TSMC 22ULL to supply logic and analog domains (3.3V input supply)....
260
3.0
Low-leakage LDO to supply logic and analog domains (up to 5.5V input supply) in SMIC 40eF
iLR-Victoria-OV-LS-ref-1.8-5.5-0.6-3.3.05_SMIC_40_EF is a Low-leakage LDO in SMIC 40eF to supply logic and analog domains (up to 5.5V input supply)....
261
3.0
Low-leakage LDO to supply logic and analog domains (up to 5.5V input supply) in TSMC 40 ULP
iLR-Victoria-OV-ref-2.7-5.5-0.55-3.3.04_TSMC_40_uLP is a Low-leakage LDO in TSMC 40uLP to supply logic and analog domains (up to 5.5V input supply) wi...
262
2.2581
Low power high performance analog receiver
The HSAFE01 is a low power high performance analog receiver. It combined with PGA from -20dB to +44dB and 16 Bit-Width 16/24/25/50MSPS High Speed ADC....
263
2.0
8-10 bit Digital-to-Analog Converter (10-bit DAC)
The agileDAC GP is a digital-to-analog converter that uses a traditional capacitive DAC architecture. The agileDAC uses its own internal reference vol...
264
2.0
8-10 bit SAR Analog-to-Digital Converter (10-bit ADC)
The agileADC analog-to-digital converter is a traditional Charge-Redistribution SAR ADC that is referenced to VDD, VSS. The architecture can achieve u...
265
2.0
Bandgap Voltage Reference, Bandgap Current Reference
The agileBandGapGP consists of a bandgap reference core together with a bandgap reference voltage generator (VREF), VREF replica current generators an...
266
2.0
Sensor Interface Subsystem
The agileSensorIF Subsystem is an efficient and highly integrated sensor interface for SoCs/ASICs. Featuring multiple Analog-to-Digital converters (ag...
267
2.0
Digital Cell Library
The agileDSCL is a compact digital standard cell library customizable for specific foundries and processes, and optimized for low-power, ultra-low-lea...
268
2.0
Sleep Management Unit (SMU) Subsystem
The agileSMU Subsystem is a low power integrated macro consisting of the essential IP blocks required to securely manage waking up a SoC from sleep mo...
269
2.0
Power Management Unit (PMU) Subsystem
The agilePMU Subsystem is an efficient and highly integrated power management unit for SoCs/ASICs. Featuring a power-on-reset, multiple low drop-out r...
270
2.0
Power-OK Monitor
The agilePOK is a Power-OK monitor that consists of a voltage reference and comparators to set a programmable high and low threshold level for power s...
271
2.0
IR Drop Sensor
The agileIRDROP I-R Drop Sensor is a circuit to detect supply I-R drops within the system. It is useful to detect loss of power or attacks to the powe...
272
2.0
Process Voltage Temperature (PVT) Sensor Subsystem
The monitoring of process, voltage and temperature variations are critical to optimize power and performance for modern SoCs/ASICs, especially for adv...
273
2.0
Programmable Threshold Analog Comparator
agileCMP GP – Programmable-Threshold Comparator The agileCMP GP programmable-threshold comparator features a user-selectable (enable/disable) hystere...
274
1.0
2.5V 12Bit pipeline analog to digital converter
TheS65LLV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range....
275
1.0
IBM 65nm Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
276
1.0
IBM 65nm Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
277
1.0
The GF22FDSOIV08_SARADC_05 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range.
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278
1.0
The GF28SLPV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range.
The GF28SLPV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input rang...
279
1.0
The GF55LPEV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range.
The GF55LPEV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input rang...
280
1.0
The S55LLEV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range.
The S55LLV25_ADC_13 IP is a 2.5V 12Bit pipeline analog to digital converter capable of running at up to 100MHz conversion rate with 2Vp-p input range....
281
1.0
Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference in SMIC 55LL
nLR-VAIPO-2.90-3.63-2.5.01_SMIC_55_LL is a low-noise linear regulator LDO in SMIC 55LL for sensitive analog blocks....
282
1.0
Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference in TSMC 55LP
nLR-VAIPO-2.90-3.63-2.5.01_TSMC_55_LP is a low-noise linear regulator LDO in SMIC 55LP for sensitive analog blocks....
283
1.0
Always-on Voice Activity Detection interfacing with analog microphones in GF 55LPx
WT-a-HD.03_GF_55_LPx is a mixed analog/digital Virtual Component (ViC) in GF 55LPx containing a Voice Activity Detection (VAD) engine for ultra low po...
284
1.0
Always-on Voice Activity Detection interfacing with analog microphones in SMIC 40LL
WT-a-HD.01_SMIC_40_LL is a mixed analog/digital Virtual Component (ViC) in SMIC 40LL containing a Voice Activity Detection (VAD) engine for ultra low ...
285
1.0
Always-on Voice Activity Detection interfacing with analog microphones in SMIC 40uLP
WT-a-HD.03_SMIC_40_uLP is a mixed analog/digital Virtual Component (ViC) in SMIC 40uLP containing a Voice Activity Detection (VAD) engine for ultra lo...
286
1.0
Always-on Voice Activity Detection interfacing with analog microphones in TSMC 22ULL
WT-a-HD.03_TSMC_22_uLL is a mixed analog/digital Virtual Component (ViC) in TSMC 22ULL containing a Voice Activity Detection (VAD) engine for ultra-lo...
287
1.0
Always-on Voice Activity Detection interfacing with analog microphones in TSMC 40uLP
WT-a-HD.01_TSMC_40_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 40uLP containing a Voice Activity Detection (VAD) engine for ultra lo...
288
1.0
Always-on Voice Activity Detection interfacing with analog microphones in TSMC 40uLP
WT-a-HD.03_TSMC_40_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 40uLP containing a Voice Activity Detection (VAD) engine for ultra lo...
289
1.0
Always-on Voice Activity Detection interfacing with analog microphones in TSMC 55uLP
WT-a-HD.03_TSMC_55_uLP is a mixed analog/digital Virtual Component (ViC) in TSMC 55uLP containing a Voice Activity Detection (VAD) engine for ultra lo...
290
1.0
SMIC0.13um Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
291
1.0
SMIC0.18um Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
292
1.0
Analog Droop Detector
Analog Droop Detector (ADD) detects power supply voltage droops and generates a flag signal when the supply voltage (VPROBE) is lower than the predefi...
293
1.0
Crystal-less USB1.1 device PHY(No analog PADs)
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294
1.0
TSMC 55nm Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
295
1.0
TSMC 65nm Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
296
1.0
GSMC0.18um Analog 2-1 MUX
This analog 2-1 MUX is designed for low speed application....
297
1.0
GSMC0.18um Analog 2-1 MUX
This analog 2 to 1 MUX is designed for low speed application...
298
1.0
CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.
VeriSilicon CSMC 0.13μm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Central Semiconductor Manufacturing Corporation (CSMC...
299
0.118
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process...
300
0.118
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process
OFDM Analog Front End(AFE) , UMC 55nm LP Low-K Logic Process...