Design & Reuse
5809 IP
2751
1.0
TSMC CLN90G 90nm General Purpose PLL - 160MHz-800MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2752
1.0
TSMC CLN90G 90nm Multi Phase DLL - 160MHz-800MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2753
1.0
TSMC CLN90G 90nm Multi Phase DLL - 320MHz-1600MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2754
1.0
TSMC CLN90G 90nm Multi Phase DLL - 80MHz-400MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
2755
1.0
TSMC CLN90G 90nm Spread Spectrum PLL - 160MHz-800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2756
1.0
TSMC CLN90G 90nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2757
1.0
TSMC CLN90G 90nm Spread Spectrum PLL - 80MHz-400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2758
1.0
TSMC CLN90GOD 90nm Clock Generator PLL - 110MHz-550MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2759
1.0
TSMC CLN90GOD 90nm Clock Generator PLL - 220MHz-1100MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2760
1.0
TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2761
1.0
TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2762
1.0
TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2763
1.0
TSMC CLN90GOD 90nm DDR DLL - 272MHz-1360MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2764
1.0
TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2765
1.0
TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2766
1.0
TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2767
1.0
TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2768
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2769
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2770
1.0
TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2771
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2772
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2773
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2774
1.0
TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2775
1.0
TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2776
1.0
TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2777
1.0
TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2778
1.0
TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2779
1.0
TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2780
1.0
TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2781
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2782
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2783
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2784
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2785
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2786
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
2787
1.0
TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2788
1.0
TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2789
1.0
TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
2790
1.0
TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2791
1.0
TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2792
1.0
TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
2793
1.0
TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
2794
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2795
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2796
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
2797
1.0
Stereo PCM to PWM Converter, SMIC 0.18um
The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...
2798
1.0
RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing
The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...
2799
1.0
RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams
The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...
2800
1.0
Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals
The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...