101 0.0

Hardware RTP Stack for H.264 Stream Encapsulation Implements a Real Time Transport Protocol (RTP) hardware stack that encapsulates H.264/NAL streams to RTP packets that are compliant with RFC 3894 and...

102 0.0

Master/Slave Octal SPI Controller Implements a controller for a single-, dual-, quad-, or octal-lane Serial Peripheral Interface (SPI) bus, which can operate either as a master or as a...

103 0.0

AC'97 Audio Controller The AC97-CTRL Audio Controller is a configurable IP block designed to simplify the integration of the AC'97 audio interface into ASIC and FPGA designs...

104 0.0

AHB/AXI4-Lite to AXI4-Stream Bridge The MM2ST IP core bridges the streaming interfaces of a peripheral or accelerator to a memory-mapped AMBA® AHB or AXI4-Lite bus. Designed for ease ...

105 0.0

ML-KEM Key Encapsulation IP Core The KiviPQC™-KEM IP core is a hardware accelerator for post-quantum cryptographic operations. It implements the Module Lattice-based Key Encapsulation...

106 0.0

Ultra-Low-Power Deeply Embedded RISC-V Processor The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipel...

107 0.0

PNG Lossless Compression Decoder The PNG-D core implements a lossless image decompression engine compliant with the Portable Network Graphics (PNG) file format specified in the ISO/IE...

108 0.0

PNG Lossless Compression Encoder The PNG-E core implements a lossless image compression engine compliant with the Portable Network Graphics (PNG) file format specified in the ISO/IEC ...

109 0.0

QOI Lossless Image Compression Core The QOIE Core is an encoder that implements a highly-efficient, low-power, lossless image compression engine compliant with the Quite OK Image format ...

110 0.0

Low-Power AVC/H.264 Baseline Profile Decoder Core The H264-LD-BP IP core implements a silicon and energy efficient hardware video decoder able to process H.264 streams produced by the H264-E-BPS, H264...

111 0.0

Low-Power AVC/H.264 Baseline Profile Encoder Core The H264-E-BPS IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standard It Implements an en...

112 0.0

SPI to AHB-Lite Bridge The SPI2AHB core implements an SPI slave to AHB-Lite master bridge. It allows an external SPI master to perform read or write access to any memory-map...

113 0.0

Multi-Channel Streaming DMA Controller The MC-SDMA IP core implements a highly configurable, bandwidth-efficient, and easy-to-use Direct Memory Access (DMA) controller that transfers data b...

114 0.0

GUNZIP / ZLIB / Inflate Data Decompression Core ZipAccel-C is a custom hardware implementation of a lossless data compression engine that complies with the Deflate, GZIP, and ZLIB compression standa...

115 0.0

AVC/H.264 Video Encoder with Compressed Frame Store The H264-E-CFS IP core is a video encoder supporting the Constrained Baseline Profile of the ISO/IEC 14496-10/ITU-T H.264 standard. It Implements an e...

116 0.0

LZ4/Snappy Data Compressor LZ4SNP-C is a custom hardware implementation of a lossless data compression engine that complies with the LZ4 and Snappy compression standards. The co...

117 0.0

LZ4/Snappy Data Decompressor LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithms. The core receives ...

118 0.0

GZIP / ZLIB / Deflate Data Compression Core ZipAccel-D is a custom hardware implementation of a lossless data decompression engine that complies with the Inflate/Deflate, GZIP/GUNZIP, and ZLIB c...

119 200.0

12-bit, 9.2 GSPS Analog-to-Digital Converter (ADC) GlobalFoundries 22nm The A12B9G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a time-interleaved successive a...

120 200.0

MACsec Engine, 1G to 100G Single-Port The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

121 200.0

MACsec Engine, 1G to 25G, Full Duplex, Integrated As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...

122 200.0

MACsec Engine, 1G to 50G Single-Port, with TSN support The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

123 200.0

MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...

124 200.0

MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...

125 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

126 200.0

HBM4 Memory Controller The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...

127 200.0

CC-6xx CryptoManager Core The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...

128 200.0

CC-7xx CryptoManager Core The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...

129 200.0

ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

130 200.0

ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

131 200.0

PCIe 7.0 Controller The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...

132 200.0

GDDR7 Memory Controller The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...

133 200.0

CH-6xx CryptoManager Hub The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...

134 200.0

CH-7xx CryptoManager Hub The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...

135 200.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6 The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

136 200.0

MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

137 200.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

138 200.0

Compute Express Link (CXL) 3.1 Controller The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....

139 200.0

LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5 The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...

140 200.0

LPDDR5T / LPDDR5X / LPDDR5 Controller The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...

141 200.0

True Random Number Generator The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...

142 200.0

RT-6xx CryptoManager Root of Trust The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...

143 200.0

RT-7xx CryptoManager Root of Trust The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...

144 195.0

PCIe 7.0 Retimer Controller The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...

145 195.0

PCIe 7.0 Switch The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...

146 190.0

PCIe 6.1 Controller The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...

147 190.0

PCIe 6.2 Switch The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...

148 190.0

MIPI CSI-2 Controller Core V2 The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...

149 190.0

MIPI DSI-2 Controller Core The Rambus DSI-2 Controller Core is the second generation DSI controller core. It is further optimized for high performance, low power and small size....

150 180.0

HBM3E/3 Memory Controller The Rambus HBM3E/3 Controller Cores are designed for use in applications requiring high memory throughput, low latency and full programmability. T...