101 0.0

ML-KEM Key Encapsulation PQC Security IP Core The KiviPQC™-KEM IP core is a hardware accelerator for post-quantum cryptographic operations. It implements the Module Lattice-based Key Encapsulation...

102 0.0

Ultra-Low-Power Deeply Embedded RISC-V Processor The BA51 is a highly configurable, low-power deeply embedded RISC-V processor IP core. It implements a single-issue, in-order, 2-stage execution pipel...

103 0.0

SM4 symmetric block cipher GB/T 32907-2016, and ISO/IEC 18033-3:2010/Amd 1:2021 The SM4 IP core implements a custom hardware accelerator for the SM4 symmetric block cipher, specified in Chinese national standard GB/T 32907-2016, a...

104 0.0

eMAC Gigabit Ethernet MAC Media Access Controller Implements an Ethernet Media Access Controller compatible with the 10/100 Mbps IEEE 802.3 and 1Gbps IEEE 802.3-2002 specifications. The controller pro...

105 0.0

PNG Lossless Compression Decoder The PNG-D core implements a lossless image decompression engine compliant with the Portable Network Graphics (PNG) file format specified in the ISO/IE...

106 0.0

PNG Lossless Compression Encoder The PNG-E core implements a lossless image compression engine compliant with the Portable Network Graphics (PNG) file format specified in the ISO/IEC ...

107 0.0

SNOW-V Security Stream Cipher Engine The SNOW-V IP core implements the SNOW-V stream cipher mechanism, aiming to meet the security demands of modern high-speed communication systems. It c...

108 0.0

QOI Lossless Image Compression Core The QOIE Core is an encoder that implements a highly-efficient, low-power, lossless image compression engine compliant with the Quite OK Image format ...

109 0.0

Low-Power Deeply Embedded RISC-V Processor The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core. It implements a single-issue, in-order, 5-stage execution pipeline, a...

110 0.0

JPEG-E-XL JPEG XL Encoder The JPEG-XL-E implements an image compression engine compliant to the JPEG XL, ISO/IEC 18181 standard. Leveraging the advanced coding tools of the JPE...

111 0.0

SPI to AHB - Lite Bridge The SPI2AHB core implements an SPI slave to AHB-Lite master bridge. It allows an external SPI master to perform read or write access to any memory-map...

112 0.0

GPIO General-Purpose I/O Controller Core The GPIO core is used to create functions in a system that are not implemented with dedicated controllers, and require simple input and/or output soft...

113 0.0

MSC Microsecond Channel (Plus) high-speed controller The MSC-CTRL IP core implements a high-speed serial interface controller designed to connect a microcontroller or SoC to external power devices or sen...

114 0.0

TSN-EP-10G TSN Ethernet Endpoint Controller The TSN-EP-10G is a highly configurable TSN Ethernet Endpoint Controller IP core designed to streamline the implementation of Time-Sensitive Networkin...

115 0.0

RTC Real-Time Clock with APB Interface The RTC-APB core implements a real-time clock (RTC) and calendar facility together with an alarm function. To keep track of time of day the core u...

116 0.0

GUNZIP / ZLIB / Inflate Data Decompression Core ZipAccel-C is a custom hardware implementation of a lossless data compression engine that complies with the Deflate, GZIP, and ZLIB compression standa...

117 0.0

PWM Pulse Width Modulator The PWM IP core implements a compact and highly flexible Pulse Width Modulator. The core generates a repeated pattern of pulse trains of run-time conf...

118 0.0

Synchronous 16450 UART ...

119 0.0

LZ4 / Snappy Data Compression LZ4SNP-C is a custom hardware implementation of a lossless data compression engine that complies with the LZ4 and Snappy compression standards. The co...

120 0.0

LZ4 / Snappy Data Decompression LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithms. The core receives ...

121 0.0

GZIP / ZLIB / Deflate Data Compression Core ZipAccel-D is a custom hardware implementation of a lossless data decompression engine that complies with the Inflate/Deflate, GZIP/GUNZIP, and ZLIB c...

122 200.0

MACsec Engine, 1G to 100G Single-Port The MACsec-IP-160 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

123 200.0

MACsec Engine, 1G to 25G, Full Duplex, Integrated As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-165 is a high-performance, split ingress/egress in-line...

124 200.0

MACsec Engine, 1G to 50G Single-Port, with TSN support The MACsec-IP-161 is a versatile MACsec solution for silicon devices that require plug-and-play MACsec processing for an Ethernet port at full line ra...

125 200.0

MACsec Engine,10M-25G Single-Port, ISO 26262 Compliant with xMII Interface The MACsec-IP-362 consists of the Rambus MACsec-IP-162 (a single-port line-rate MACsec engine with FIFO interface and optional preemption) and xMII in...

126 200.0

MACsec Engine,10M-50G Single-Port with xMII Interface and TSN Support The MACsec-IP-361 is a plug-and-play solution for adding MACsec on the xMII side of an Ethernet subsystem. It is ISO 26262 ASIL-B Ready certified and ...

127 200.0

UALink IP Solution with PHY, Controller and Verification IP The Synopsys UALink IP solution, consisting of UALink Controller, PHY, and verification IP, is designed to meet the performance requirements for AI Ac...

128 200.0

HBM4 Memory Controller The Rambus HBM4 Controller Core is designed for use in applications requiring high memory bandwidth and low latency including AI/ML, HPC, advanced dat...

129 200.0

CC-6xx CryptoManager Core The Rambus CryptoManager Core CC-6xx is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-6xx. The CC-6xx products are designed...

130 200.0

CC-7xx CryptoManager Core The automotive-grade Rambus CryptoManager Core CC-7xx family is a standalone symmetric cipher-only subsystem of the CryptoManager Hub CH-7xx. The CC-7...

131 200.0

ICE-IP-338 High-speed XTS-GCM Multi Stream Inline Cipher Engine The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

132 200.0

ICE-IP-358 High-speed XTS-GCM Multi Stream Inline Cipher Engine, DPA resistant The Protocol-IP-338 (EIP-338) is a scalable, high-performance, multi-stream cryptographic engine that offers XTS and GCM modes of operation for the AE...

133 200.0

PCIe 7.0 Controller The Rambus PCI Express® (PCIe®) 7.0 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 6...

134 200.0

GDDR7 Memory Controller The Rambus GDDR7 controller core is designed for use in applications requiring high memory throughput including graphics, high performance computing (...

135 200.0

CH-6xx CryptoManager Hub The Rambus CryptoManager Hub CH-6xx is the next generation of flexible and configurable cryptographic family of accelerator cores. CH-6xx designs targ...

136 200.0

CH-7xx CryptoManager Hub The automotive-grade CryptoManager Hub (CMH) from Rambus is the next-generation of flexible and configurable cryptographic family of accelerator cores...

137 200.0

MIPI C-PHY/D-PHY Combo CSI-2 RX+ IP (6.0Gsps/trio, 4.5Gbps/lane) in TSMC N6 The MXL-CDPHY-6p0G-CSI-2-RX+-T-N6 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificat...

138 200.0

MIPI C-PHY/D-PHY Combo RX+ IP (4.5Gsps/4.5Gbps) in TSMC N5 The MXL-CD-PHY-CSI-RX+-T-N05 is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...

139 200.0

MIPI C-PHY/D-PHY Combo Universal IP (8.0Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC The MXL-CDPHY-UNIV-8p0G-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specificatio...

140 200.0

Compute Express Link (CXL) 3.1 Controller The Rambus Compute Express Link® (CXL®) 3.1 controller is a parameterizable design for ASIC and FPGA implementations. It leverages the Rambus PCIe® 6....

141 200.0

LPDDR Combo Controller - LPDDR4X/4 & LPDDR5T/5X/5 The Rambus LPDDR4 and LPDDR5 combo controller core is designed for use in applications requiring high memory throughput at low power including mobile,...

142 200.0

LPDDR5T / LPDDR5X / LPDDR5 Controller The Rambus LPDDR5 Controller supporting LPDDR5T, LPDDR5X, LPDDR5 controller core is designed for use in applications requiring high memory throughput ...

143 200.0

True Random Number Generator The EIP-76 TRNG is an advanced hardware based, technology independent True Random Number Generator. Security is now a basic requirement for all device...

144 200.0

RT-6xx CryptoManager Root of Trust The Rambus CryptoManager RT-6xx v3 Root of Trust (CMRT) family from is the latest generation of fully programmable FIPS 140-3 compliant hardware secur...

145 200.0

RT-7xx CryptoManager Root of Trust The Rambus automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 complian...

146 195.0

PCIe 7.0 Retimer Controller The Rambus PCI Express® (PCIe®) 7.0 Retimer Controller provides a complete digital data path solution that delivers best-in-class latency, power and a...

147 195.0

PCIe 7.0 Switch The Rambus PCI Express® (PCIe®) 7.0 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC and FPGA implementations. It enable...

148 190.0

PCIe 6.1 Controller The Rambus PCI Express® (PCIe®) 6.1 Controller is a configurable and scalable design for ASIC implementations. It is backward compatible to the PCIe 5...

149 190.0

PCIe 6.2 Switch The Rambus PCI Express® (PCIe®) 6.2 Switch is a customizable, multiport embedded switch for PCIe designed for ASIC implementations. It enables the con...

150 190.0

MIPI CSI-2 Controller Core V2 The Rambus CSI-2 Controller Core V2 is the second generation CSI-2 controller core. It is further optimized for high performance, low power and small ...