Design & Reuse
458 IP
451
0.0
LVDS TX Combo TTL PHY
Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...
452
0.0
LVDS TX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
453
0.0
LVDS/TTL PHY & Controller
INNOSILICON™ LVDS/TTL IP implements the LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface. It supports either...
454
0.0
Over voltage detector
Over voltage detector...
455
0.0
PVT sensor in 28nm
PVTSENU28HPCP is an IP for process voltage and temperature sensing of the silicon chip die. It has unique features like voltage and temperature probes...
456
0.0
Expanded Serial Peripheral Interface (xSPI) Slave Controller
The MAXVY's JESD251 Expanded Serial Peripheral Interface Slave controller is provides high data throughput, low signal count, and limited backward com...
457
0.0
Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...
458
0.0
Type-C PHY
Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...