Design & Reuse
3744 IP
1
0.0
10/25/40/100G Ethernet MAC
The Chevin Technology Ethernet MAC IP core can simplify the FPGA integration of Ultra low-latency 10/25/40/100G MAC Ethernet connectivity in Intel and...
2
0.0
10/25/40/100G Ethernet PCS/PMA
The Chevin Technology PCS/ PMA is an IP core that simplifies the FPGA integration of Ultra low-latency 10/25/40/100G Ethernet connectivity in Intel an...
3
0.0
10/25/40/100G MAC/PCS Ethernet IP Core
The 10/25/40/100G MAC IP core is a Low-Latency Ethernet MAC with a latency of 44.8ns in 2749 LUTs for 10Gbit/s and 20.5ns in 2680 LUTs for 25Gbit/s. W...
4
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10Gbit/s Ethernet UDT Server for FPGAs
FPGA Synthesisable 10Gbit/s Ethernet UDT4 server for reliable long distance/high bandwidth data transfer...
5
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25G LL MAC /PCS Ethernet IP for FPGA
The Chevin Technology 25G LL MAC/PCS combines the 25G MAC and 25G PCS IP cores to obtain the lowest possible latency while simplifying the integration...
6
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25Gbit/s Ethernet MAC
The Chevin Technology 25GMAC IP core provides Ultra Low-Latency 25Gbit/s Ethernet connectivity in Xilinx Virtex® UltraScale™ FPGAs. The 25GMAC can...
7
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25Gbit/s Ethernet PCS
The Chevin Technology 25GPCS provides Ultra low-latency 25Gbit/s Ethernet connectivity in Xilinx Virtex® UltraScale™ FPGAs. Ultra-low latency is achie...
8
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SATA 3.0 Host Controller
The Chevin Technology SATA-HC IP block simplifies the integration of high capacity SSDs utilizing SATA I/II/III at 1.5/3/6Gbit/s data rates using Xili...
9
0.0
TCP/IP - 10/25/40/100G Ethernet TCP Offload Engine
Chevin Technology’s TCP/IP Offload Engine is an FPGA Synthesisable Ethernet TCP/IP server/client in a lean and fast, all-RTL solution. Chevin Technolo...
10
0.0
UDP/IP - 10/25/40/100G Ethernet UDP/IP Offload Engine
Chevin Technology’s 10/25/40/100G UDP/IP Offload Engine for FPGAs has low latency and bandwidth overhead, as it sends packets of data without confirm...
11
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Chevin Technology - Engineering design services
At Chevin Technology, we offer our customers expert engineering design services that are flexible, cost effective and well supported. Customers can g...
12
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Silicon Security Solution
ChevinID™ was designed by Chevin Technology using patented method (GB2609026) to add a further layer of protection to your Silicon supply chain by ide...
13
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HMAC-SHA256 Accelerator
Chevin Technology’s HMAC-SHA256 cryptographic accelerator function is used to securely generate and verify message authentication codes. Message authe...
14
0.0
ARP/ICMP Protocol for Ethernet
The CT1006-XGARP/ICMP block adds RTL-hardened functions for ICMP and ARP to any FPGA application. The all-RTL block includes part of the ARP protoc...
15
46.6667
Bluetooth Low Energy 6.0 Digital IP
SB1001-CM is a full single-source BLE 6.0 Subsystem IP, consisting of an integrated Controller and Modem....
16
46.6667
Bluetooth Low Energy 6.0 Scalable RF IP
The SB1001 Scalable RF Transceiver IP is designed to maximise Performance per μW across the full range of BLE applications, enabling active Receiver p...
17
46.6667
Bluetooth Low Energy Subsystem IP
SB1001-00 is a full single-source BLE 6.0 Subsystem IP1, consisting of an integrated Controller and Modem paired to a proprietary RF on T22 ULL....
18
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Sasken Technologies - Automotive Cybersecurity Services
We simplify complexity, accelerate innovation, and supercharge transformation, helping businesses mitigate risks, streamline compliance, and build res...
19
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LDPC Encoder / Decoder for 3GPP 5G NR
Our LDPC encoding and decoding IP for the 3GPP New Radio uplink and downlink data channel includes the entire processing chain, to provide quick and e...
20
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PDSCH Encoder for 3GPP 5G NR
3GPP compliant coding and modulation for Downlink Physical Shared Channels The Physical Downlink Shared Channel (PDSCH) is used for downlink data w...
21
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LEOphy - 5G NTN complete high PHY solution
As the wireless telecommunication industry evolves to become open, virtualized and disaggregated, there is an increased need for interoperable solutio...
22
0.0
SiliConch Systems Pvt Ltd - Design and Verification services
Who we areSiliConch Systems is fab-less semiconductor company, established in 2016 having its headquarters in Bangalore, India. Where We BeganSiliC...
23
0.0
Single/Multi Port USB Type-C Power Delivery Verification IP
SiliConch SCPD3013VIP is a configurable Multiport USB Type-C Power Delivery (PD) Verification IP that is based on the latest USB Power Delivery specif...
24
0.0
RISC-V formal verification solution
Modern processors implement numerous optimizations for power, performance, and area. Optimizations such as pipelining, interlocking, and data forwardi...
25
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RISC-V ISA Formal Proof Kit
ISA Formal Proof Kit®Axiomise designed a formal verification proof kit for checking RISC-V ISA compliance for specific RISC-V micro-architectures....
26
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Polar Encoder / Decoder for 3GPP 5G NR
Our patented polar encoding and decoding IP for the 3GPP New Radio uplink and downlink includes the entire processing chain, to provide quick and easy...
27
0.0
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm. The core decodes a bitstream produced by the OLH2...
28
0.0
PUSCH Decoder for 3GPP 5G NR
3GPP compliant coding and modulation for Physical Shared Channels The Physical Uplink Shared Channel (PUSCH) is used to for uplink data which is sh...
29
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PUSCH Equalizer for 3GPP 5G NR
Advanced 3GPP compliant equalisation, double uplink performance and spectral efficiency with this 5G NR Uplink Physical Shared Channel solution Acc...
30
0.0
Axiomise - Formal Verification Training
Welcome to Axiomise new online portal for on-demand and instructor-led courses. Working with the top educational experts we have distilled down the b...
31
130.0
LPDDR6, LPDDR5X Combo PHY & Controller
INNOSILICON™ introduces its LPDDR6/5X PHY and Controller IP, purpose-built for the AI era’s high-performance chip design needs. This solution is fully...
32
100.0
1-56/112G Multi-protocol Serdes (Interlaken, JESD204, CPRI, Ethernet, OIF/CEI)
eTopus designs ultra-high speed mixed-signal semiconductor IP solutions for high-performance computing and data center applications. Our 1-56/112Gbps ...
33
100.0
400G ultra low latency 56/112G FEC and SERDES IP sub 10ns latency
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34
100.0
56G Serdes in 7nm bundled with PCie Gen 5 controller IP
New IP for value conscious designers....
35
100.0
PCIe 5.0 PHY & Controller
The Innosilicon Gen1/2/3/4/5 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, h...
36
100.0
PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
Multiprotocol low latency, low power SERDES IP....
37
100.0
The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
SuperFlash® is SST’s patented and proprietary NOR flash technology. With 80B+ devices shipped, SuperFlash is the non-volatile memory of choice for emb...
38
100.0
Complete USB Type-C Power Delivery PHY, RTL, and Software
The OTI9108 is a complete single transceiver front end for data USB PD Type-C (baseband) communications. It has a register interface which, with an MP...
39
100.0
LPDDR5X, LPDDR5, LPDDR4X, LPDDR4 Combo PHY & Controller
The INNOSILICON™ LPDDR IP includes a LPDDR5X/5/4X/4 Combo PHY and controller. It is fully compliant with the JEDEC standard. Optimized for low-power a...
40
80.0
GDDR7 PHY & Controller
The INNOSILICON™ GDDR7 PHY is fully compliant with the JEDEC GDDR7 standard, supporting data rates of up to 32 Gbps in PAM3 mode. In PAM3 mode, each b...
41
70.0
DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
42
70.0
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
43
70.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
44
60.0
UCIe Chiplet PHY & Controller
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
45
60.0
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology...
46
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
47
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
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48
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
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49
50.0
LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
50
46.0
32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...