Design & Reuse
3755 IP
51
46.0
32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...
52
46.0
32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...
53
40.0
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
54
40.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
55
40.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
56
30.0
4-/8-bit mixed-precision NPU IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
57
30.0
UCIe Die-to-Die Chiplet Controller
Introducing OPENEDGES’ Universal Chiplet Interconnect Express (UCIe) Controller IP, OUC, designed to transform the semiconductor landscape with innova...
58
30.0
UFS Host Controller 4.1 IP
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides comma...
59
30.0
High speed NoC (Network On-Chip) Interconnect IP
OPENEDGES is the only total memory system IP company providing both memory controller and on-chip interconnect. OIC is the ORBIT high-speed On-chip In...
60
30.0
Highly scalable inference NPU IP for next-gen AI applications
OPENEDGES, the total memory subsystem IP provider, introduces ENLIGHT Pro, a state-of-the-art inference neural processing unit (NPU) IP that outperfor...
61
30.0
RISC-V Tensor Unit
The bulk of computations in Large Language Models (LLMs) is in fully-connected layers that can be efficiently implemented as matrix multiplication. Th...
62
30.0
All in one solution for AI in RISC-V
...
63
29.0
USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The OTS9106 board is a complete FPGA and ARM processor based USB PD Type-C port, featuring the RTL and C source code of the Obsidian Technology OTI910...
64
25.0
HBM4, HBM3E PHY & Controller
INNOSILICON™ HBM4/3E IP is fully compliant with the JEDEC standard for HBM3E and the preliminary specification for HBM4. The IP includes a customizabl...
65
25.0
DDR5, DDR4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR5/4 Combo PHY s provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDR...
66
25.0
Superscalar Out-of-Order Execution Multicore Cluster
AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on AndeStar™ V5 architectu...
67
20.0
100Base-T1 Automotive Ethernet PHY
100Base-T1 Automotive Ethernet PHY...
68
20.0
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 4.0 IP suppo...
69
20.0
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...
70
20.0
GDDR6 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
71
20.0
High Performance HBM, HBM3 Memory Controller
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
72
20.0
MIPI C-PHY/D-PHY Combo(5nm, 7nm, 12/16nm, 28nm, 40nm, 55nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
73
20.0
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm)
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...
74
20.0
LPDDR4/3, DDR4/3 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
75
20.0
LPDDR4x/4 PHY IP for 22nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
76
20.0
LPDDR5X/5/4X/4 combo PHY at 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
77
20.0
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....
78
15.5556
SMD RISC-V SDK
Quickly and seamlessly develop, debug and fine-tune applications for Semidynamics RISC-V hardware with the SMD RISC-V SDK. It is a complete software d...
79
15.0
GDDR6X, GDDR6 Combo PHY & Controller
The INNOSILICON™ GDDR6X/6 PHY is fully compliant with the JEDEC GDDR6X/6 standard, supporting data rates of up to 20 Gbps per pin for PAM2 GDDR6 mode ...
80
11.0
NVM Anti-Fuse OTP NeoFuse in DBHitek(90nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
81
11.0
NVM Anti-Fuse OTP NeoFuse in GLOBALFOUNDRIES (55nm, 40nm, 28nm, 22nm, 12nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
82
11.0
NVM Anti-Fuse OTP NeoFuse in HHNEC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
83
11.0
NVM Anti-Fuse OTP NeoFuse in HLIC (28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
84
11.0
NVM Anti-Fuse OTP NeoFuse in Huali (55nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
85
11.0
NVM Anti-Fuse OTP NeoFuse in Maxchip (90nm, 80nm, 55nm, 40nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
86
11.0
NVM Anti-Fuse OTP NeoFuse in NEXCHIP (90nm, 55nm, 40nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
87
11.0
NVM Anti-Fuse OTP NeoFuse in Samsung (130nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
88
11.0
NVM Anti-Fuse OTP NeoFuse in SKHYNIX (90nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
89
11.0
NVM Anti-Fuse OTP NeoFuse in SMIC (90nm, 55nm, 40nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
90
11.0
NVM Anti-Fuse OTP NeoFuse in TSMC (130nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N5A, N4P)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
91
11.0
NVM Anti-Fuse OTP NeoFuse in UMC (110nm, 80nm, 55nm, 40nm, 28nm, 22nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
92
11.0
NVM Anti-Fuse OTP NeoFuse in USJC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
93
11.0
NVM Anti-Fuse OTP NeoFuse in Vanguard (150nm, 110nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
94
11.0
NVM Anti-Fuse OTP NeoFuse in XMC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
95
11.0
NVM EEPROM NeoEE in CSMC (180nm, 160nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
96
11.0
NVM EEPROM NeoEE in GLOBALFOUNDRIES (180nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
97
11.0
NVM EEPROM NeoEE in Grace (180nm, 160nm, 130nm, 110nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
98
11.0
NVM EEPROM NeoEE in HJTC (180nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
99
11.0
NVM EEPROM NeoEE in MagnaChip (180nm, 130nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...
100
11.0
NVM EEPROM NeoEE in Maxchip (180nm, 150nm, 90nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...