Design & Reuse
5161 IP
601
75.0
CXL 2.0 Agilex FPGA Acclerator Card
Mobiveil’s CXL-Aglx Accelerator platform is a PCIe® Gen5 add-in card with latest Intel’s Agilex I series FPGA. It supports High-Performance Applicatio...
602
70.0
40G UCIe PHY IP on Samsung SF4X
Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...
603
70.0
CAN CC, CAN FD, and CAN XL Bus Controller
The CAN-CTRL implements a highly featured and reliable CAN bus controller that performs serial communication according to the Controller Area Network ...
604
70.0
WAVE6010, H.265, HEVC, H.264, AVC, video decoder IP for 4K and 8K New!
WAVE6010 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@500MHz r...
605
70.0
WAVE6031, AV1, H.265, HEVC, H.264, AVC, VP9 video decoder IP for 4K and 8K New!
WAVE6031 is a 4K/8K multi-standard video decoder HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 8K30fps/4K1...
606
70.0
WAVE6100, H.265, HEVC, H.264, AVC, video encoder IP for 4K and 8K New!
WAVE6100 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
607
70.0
WAVE6110, H.265, HEVC, H.264, AVC, video codec IP for 4K and 8K New!
WAVE6110 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
608
70.0
Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...
609
60.0
WAVE637DV, AV1, H.265, HEVC, H.264, AVC, VP9 video codec IP for 4K
WAVE637DV is a 4K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 4K60fps@500MHz ...
610
60.0
DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
611
60.0
MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm
The I3C bus (incl. PHY) is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and vario...
612
60.0
Modern Audio DSP, designed for battery operated, high-performance, audio and voice applications
Ceva-BX1 inherent low power design and compact code size make it ideal for a broad range of advanced audio/voice applications, requiring signal proces...
613
60.0
Turnkey UWB MAC and PHY platform IP, for FiRa 2.0, CCC Digital Key 3.0, and Radar
Ceva-Waves UWB is a low power ultra-wideband (UWB) MAC and PHY platform IP based on 802.15.4 HRP, the FiRa Consortium and the Car Connectivity Consort...
614
52.0
MIPI C-PHY/D-PHY Combo CSI-2 TX+ IP 3.5Gsps/2.5Gbps
The MXL-CDPHY-3p5G-CSI-2-TX+-40LP is a high-frequency, low-power, low-cost, source synchronous, physical Layer supporting the MIPI Alliance Specificat...
615
52.0
MIPI C-PHY/D-PHY Combo DSI RX+ IP (4.5Gsps/trio, 6.5Gbps/lane) in TSMC 16FFC
The MXL-CD-PHY-DSIRX+-T-16FFC is a high-frequency, low-power, low-cost, source-synchronous, physical Layer supporting the MIPI Alliance Specification ...
616
52.0
MIPI D-PHY CSI-2 RX (Receiver) in GlobalFoundries 22FDX
The MXL-DPHY-CSI-2-RX-GF-22FDX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Specification ...
617
52.0
MIPI D-PHY DSI RX (Receiver) in GlobalFoundries 22FDX
The MXL-DPHY-DSI-RX-GF-22FDX is a high-frequency, low-power, low-cost, source-synchronous, physical layer supporting the MIPI Alliance Specification f...
618
52.0
PVT - Process, Voltage, and Temperature Monitor TSMC 7nm
The ODT-PVT-ULP-001C-7T is an ultra-low power temperature, voltage and process monitor designed in a 7nm CMOS process. This IP operates over the entir...
619
50.0
40G UCIe PHY for high-density advanced packages
Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...
620
50.0
40G UCIe PHY for organic substrate standard packages
Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...
621
50.0
11-bit, 5 GSPS Analog to Digital Converter (ADC) IP block - GlobalFoundries 22nm
The A11B5G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 11-bit r...
622
50.0
12-bit, 9 GSPS High Performance Swift™ DAC in 16nm CMOS
The ODT-DAC-12B9G-16 is a high performance current steering 12-bit 9GSPS DAC on 16nm CMOS process that operates at an update rate of up to 9GSPS. The ...
623
50.0
32G PHY in TSMC (16nm, 12nm, N7, N6, N5, N5A, N4C, N3E, N3P)
The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...
624
50.0
I3C Host Controller
The MIPI I3C interface is an evolutionary standard that improves upon the features of I2C, while maintaining backward compatibility. This standard off...
625
50.0
56G Ethernet PHY in TSMC (16nm, 12nm)
The complete silicon-proven Synopsys IP solution, consisting of configurable digital controllers, PHYs, Integrity and Data Encryption (IDE) Security M...
626
50.0
CAN 2.0B Bus Controller IP Core
The Controller Area Network (CAN) controller IP that implements the CAN2.0A, CAN2.0B as well as newer high performance Non ISO CAN-FD protocols. It ca...
627
50.0
WAVE-J, 8-bit, 12-bit JPEG Codec IP upto 64Kx64K New!
Chips&Media WAVE-J is a standalone and high-performance JPEG codec IP that can perform JPEG Baseline/Extended and MJPEG decoding and encoding. Com...
628
50.0
WAVE517, AV1, H.265, HEVC, H.264, AVC, VP9, AVS2 video decoder IP for 4K
The world-leading hardware IP provider, Chips&Media, pre-released the multi-standard HW IP named WAVE517, targeting 4K ultra-high-definition (UHD), wh...
629
50.0
WAVE521C, H.265, HEVC, H.264, AVC video codec IP for 4K
WAVE521C is a 4K multi-format codec IP to support both HEVC/H.265 and AVC/H.264 video standards. This IP core provides real-time performance for encod...
630
50.0
WAVE627, AV1, H.265, HEVC, H.264, AVC, video encoder IP for 4K
WAVE627 is a 4K multi-standard video encoder HW IP that supports AV1, HEVC/H.265, and AVC/H.264 video codec standards. It provides 4K60fps@500MHz real...
631
50.0
WAVE633, H.265, HEVC, H.264, AVC, video codec IP for 4K
WAVE633 is a 4K multi-standard video codec HW IP that supports HEVC/H.265 and AVC/H.264 video codec standard. It provides 4K60fps@500MHz real-time enc...
632
50.0
HBM3 PHY V2 in TSMC (N5, N4P, N3E)
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
633
50.0
PCIe 4.0 PHY in TSMC (28nm, 16nm, 12nm, N7, N3P)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
634
50.0
PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N5, N4P, N4C, N3E, N3P)
The multi-channel Synopsys PHY IP for PCI Express® 5.0 and CXL includes Synopsys’ high-speed, high-performance transceiver to meet today’s applicatio...
635
50.0
PCIe Gen3 to SRIO Gen3 Bridge (FPGA)
Mobiveil’s PCIe Gen3 to SRIO Gen3 Bridge is a high-performance FPGA-based protocol conversion IP that enables seamless communication between PCI Expre...
636
50.0
PCIe Gen5 NVMe SSD RAMDISK Reference Platform
Mobiveil’s RAMDISK-Gen5is a PCIe Gen5 and 1.4 NVMe compliant Ramdisk that emulates the next generation NVMe Gen5 SSDs with high performance. With hi...
637
50.0
SD 3.0 / SDIO 3.0 / eMMC 5.0 Host Controller
Arasan Chip Systems’ eMMC 5.0 / SD3.0 Host Controller IP (3MCR) is a highly integrated host controller IP solution that supports three key memory and ...
638
50.0
HDMI 2.1 Tx PHY in TSMC (16nm, 12nm, N7, N6, N4, N3E)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
639
50.0
HDMI 2.1/DisplayPort 2.1 TX PHY in TSMC (N3E, N3P)
The Synopsys HDMI 2.1 TX Controller and PHY IP solutions,compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide the...
640
50.0
DDR5 PHY in TSMC (N5, N4P, N3P, N3E)
The Synopsys DDR5/4 PHY is a complete physical layer IP interface (PHY) solution for ASIC, ASSP, and system-on-chip (SoC) applications requiring high-...
641
50.0
Ceva-Waves Bluetooth 5.4 dual mode Baseband Controller
Ceva-Waves Bluetooth 5.4 dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It contains both "classic" BR/EDR Bluetoot...
642
50.0
Ceva-Waves Bluetooth 6.0 dual mode Baseband Controller
Ceva-Waves Bluetooth dual mode IP is a complete and flexible solution for integration into SoCs/ASSPs. It has been qualified for Bluetooth Core Specif...
643
50.0
UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0
The Arasan UFS Host -UniPro IP is a simple, high performance, serial interface used primarily in mobile systems between host processing and NVM mass s...
644
50.0
5G Baseband Platform IP for Mobile Broadband and IoT
PentaG2™ is Ceva’s second generation 5G NR baseband modem IP platform. It is the industry’s only platform offering capable of meeting the extreme perf...
645
50.0
AHB Octal SPI Controller with PSRAM and XIP Support
The Silvaco Octal SPI Memory Controller IP core is a serial peripheral interface (SPI) master which controls an external serial device, usually an ind...
646
50.0
High Performance DDR5/4/3 Memory Controller
Mobiveil's DDR5/4/3 Memory Controller is a highly flexible and configurable design targeted for high performance enterprise server and real-time consu...
647
50.0
MIPI C-PHY v1.0 D-PHY v1.2 TX 2 trios/2 Lanes in TSMC (12nm, N5, N3P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
648
50.0
MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N3P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
649
50.0
MIPI C-PHY v1.2 D-PHY v2.1 TX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5, N4, N3E)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...
650
50.0
MIPI C-PHY v2.0 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (N7, N6, N5, N4, N3E, N3P)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...