Design & Reuse
5161 IP
751
25.0
MIPI C-PHY v1.1
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.0 improves throughput over a bandwidth limited channel, allowing more data without in...
752
25.0
MIPI C-PHY V1.1 TSMC 28nm HPC+
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.1 improves throughput over a bandwidth limited channel, allowing more data without in...
753
25.0
MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
Combination MIPI CPHY-DPHY Analog Interface The MIPI C-PHY V1.0 improves throughput over a bandwidth limited channel, allowing more data without in...
754
25.0
MIPI D-PHY Tx v1.1 ONLY @1.5ghz Ultra Low Power & Low Area for IoT & Wearables
Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. Arasan’s D-PHY IP is a...
755
25.0
MIPI D-PHY V1.2@2.5GHz TSMC28nm HPC+
Arasan has the industry’s broadest portfolio of foundry and process technology support for MIPI D-PHY in the industry. The MIPI D-PHY analog IP is ava...
756
25.0
FlexCAN Controller
The FlexCAN controller is a highly configurable, synthesizable core implementing the CAN protocol (ISO 11898-1), CAN with Flexible Data rate (CAN FD),...
757
25.0
FlexRay Controller
The FlexRay Controller fully complies with FlexRay Communication System Protocol Specification, Version 2.1, Revision A. It implements the specificati...
758
25.0
Ultra-Fast Baseline and Extended JPEG Decoder Core
This JPEG decompression IP core supports the Baseline Sequential DCT and Extended Sequential DCT modes of the ISO/IEC 10918-1 standard. It implements ...
759
25.0
ONFI 5.0 Controller
Arasan Chip System’s NAND flash controller IP provides easy, reliable access to an off-chip NAND flash. It supports all modes of the Open NAND Flash I...
760
25.0
ONFI 5.0 PHY
Open NAND Flash Interface (ONFI) for NAND Flash Memory chips is an open standard. Arasan’s ONFI 5.0 PHY IP is designed to connect seamlessly with thei...
761
25.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
762
25.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
763
25.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
764
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
765
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
766
25.0
Process Detector (For DVFS and monitoring process variation)
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
767
25.0
Process Detector (For DVFS and monitoring process variation), TSMC 12FFC
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...
768
25.0
TSN Ethernet Endpoint Controller
The TSN-EP implements a configurable controller meant to ease the implementation of endpoints for networks complying to the Time Sensitive Networking ...
769
25.0
TSN Ethernet Switch
The TSN-SW implements a highly flexible, low-latency TSN Ethernet switch. It supports Ethernet bridging according to the IEEE 802.1Q-2018 standard and...
770
25.0
MultiCAN Controller
Since its introduction in the mid-1980s, the Controller Area Network (CAN) has become a standard network protocol for automotive applications. Cars ma...
771
20.0
1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (12nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
772
20.0
1.8V/3.3V I2C 5V Failsafe Failtolerant Automotive Grade 1 in GF (22nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
773
20.0
1.8V/3.3V I2C in GF (12nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
774
20.0
10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
The 10 Gigabit Ethernet Media Access Controller with IEEE 1588 PTP IP core is compliant to the Ethernet/IEEE 802.3-2008 standard and has hardware bas...
775
20.0
13-bit, 80 MSPS Analog-to-Digital Converter (ADC) IP Block TSMC 65nm
The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid-SAR ADC, with 13-bit ...
776
20.0
I3C Dual Controller
The Arasan I3C Secondary Controller IP Core implements Active controller functionality as defined by the MIPI Alliance’s I3C Specification and Seconda...
777
20.0
CAT Trip Sensor, TSMC N4P
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a remote thermal sensor...
778
20.0
HBM3 PHY (Hard 1) in TSMC (N6, N5)
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
779
20.0
HBM3 PHY in TSMC (N5, N6, N7)
The Synopsys HBM3 PHY is a complete physical layer IP interface (PHY) solution for high-performance computing (HPC), AI, graphics, and networking ASIC...
780
20.0
PCIe 2.0 PHY in Fujitsu (40nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
781
20.0
PCIe 2.0 PHY in GF (40nm, 28nm, 22nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
782
20.0
PCIe 2.0 PHY in SMIC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
783
20.0
PCIe 2.0 PHY in TSMC (28nm, 16nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
784
20.0
PCIe 2.0 PHY in UMC (40nm, 28nm)
The multi-channel Synopsys PHY IP for PCI Express® 2.1/1.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s demands for hig...
785
20.0
PCIe 3.0 PHY in GF (28nm, 22nm)
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
786
20.0
PCIe 3.0 PHY in UMC (28nm)
The multi-channel Synopsys PHY IP for PCI Express® 3.1 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
787
20.0
PCIe 4.0 PHY in GF (14nm, 12nm)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
788
20.0
PCIe 4.0 PHY in Samsung (14nm, 11nm, SF5A, SF2, SF2P)
The multi-channel Synopsys PHY IP for PCI Express® 4.0 includes Synopsys’ high-speed, high-performance transceiver to meet today’s applications’ deman...
789
20.0
SD 4.0 UHS-II PHY TSMC 28nm HPM North-South
SD 4.0 (UHS-II) achieves a peak interface speed of 3.12 Gbps. Arasan’s UHS-II PHY is compliant with the specification of UHS-II and is an extremely ar...
790
20.0
SD 4.1 UHS-II PHY for TSMC 12nm FF
The rapid proliferation of high-performance mobile and handheld devices has resulted in increasing requirements for non-volatile memory. Memory interf...
791
20.0
GDDR6 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
792
20.0
HDMI 2.0 RX 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
793
20.0
HDMI 2.0 RX 4P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
794
20.0
HDMI 2.0 RX PHY in Samsung (8nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
795
20.0
HDMI 2.0 TX PHY 6Gbps in SMIC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
796
20.0
HDMI 2.0 TX PHY 6Gbps in TSMC (28nm, 16nm, 12nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
797
20.0
HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC (28nm)
The Synopsys HDMI Receiver (RX) IP solutions are compliant with the High- Definition Multimedia Interface (HDMI) 2.0 and 1.4 specifications and provid...
798
20.0
HDMI 2.0/MHL TX Combo 6Gbps in TSMC (28nm)
The Synopsys HDMI Transmitter (TX) IP solutions are compliant with the HDMI 2.0 and 1.4 specifications, and provide the necessary logic to implement ...
799
20.0
HDMI 2.1 Audio PLL in Samsung (14nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...
800
20.0
HDMI 2.1 Audio PLL in TSMC (16nm, 12nm)
The Synopsys HDMI 2.1 RX Controller and PHY IP solutions, compliant with the High-Definition Multimedia Interface (HDMI) 2.1 specification, provide th...