Design & Reuse
5161 IP
851
20.0
MIPI DSI-2 host/device controllers for high-speed serial interface between application processor and displays
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
852
20.0
MIPI I3C controller delivers high bandwidth and scalability for integration of multiple sensors
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
853
20.0
MIPI M-PHY G4 Type 1 1Tx1RX in TSMC (16nm, 12nm, N5)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...
854
20.0
MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...
855
20.0
MIPI M-PHY G5 Type 1 2Tx2Rx in Samsung (14nm)
The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...
856
20.0
MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
857
20.0
eMMC 5.1 Host Controller
The eMMC 5.1 Host Controller IP from Arasan Chip Systems is a highly integrated host controller IP solution. This IP handles all of the timing and ...
858
20.0
eMMC LDPC Encoder/Decoder
Mobiveil’s eMMC LDPC Encoder/Decoder is an advanced flash reliability solution engineered to maximize flash endurance and retention. Featuring industr...
859
20.0
Analog Front End: 2x 12-bit 4 GSPS IQ ADCs, 2x 12-bit 8GSPS IQ DACs, bandgap, temp sensor, PLL, 4 x LDO
The ODT-AFE-2T2R-GF22FDX is an ultra-high performance AFE designed in a Global Foundries 22nm process. The AFE includes two 12-bit, 4GSPS I/Q ADC pair...
860
20.0
IO 1.2V GPIO in Samsung (4nm)
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
861
20.0
IO 1.8V GPIO in Samsung (4nm)
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
862
20.0
IO 1.8V LVDS Automotive Grade 1 GF (22nm)
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
863
20.0
IO 1.8V LVDS in GF (22nm)
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
864
20.0
IO 1.8V LVDS Rx in GF (12nm)
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
865
20.0
IO 3.3V eMMC in GF (22nm)
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
866
20.0
IO 3.3V LVDS Rx Automotive Grade 2 in GF (12nm)
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
867
20.0
IO 3.3V LVDS Rx in GF (12nm)
Synopsys Low Voltage Differential Signaling (LVDS) I/O library is a high-frequency interface that uses differential signals for data transmission. A f...
868
20.0
IO GPIO in TSMC for Automotive Grade 1 (22nm)
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
869
20.0
IO I2C 3.3V in GF (22nm)
Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters ...
870
20.0
IO I3C 3.3V in GF (22nm)
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
871
20.0
IP Prototyping Kits for USB, DDR, MIPI, PCI Express protocols
The Synopsys IP Prototyping Kits, part of the IP Accelerated initiative, center around a complete, out-of-the-box reference design that consists of a ...
872
20.0
LPDDR4 multiPHY V2 in GF (22nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
873
20.0
LPDDR4 multiPHY V2 in Samsung (14nm, 11nm, 10nm, 8nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
874
20.0
LPDDR4 multiPHY V2 in TSMC (28nm, 22nm, 16nm, 12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
875
20.0
LPDDR4/3, DDR4/3 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
876
20.0
LPDDR4X multiPHY in GF (14nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
877
20.0
LPDDR4X multiPHY in Samsung (14nm, 11nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
878
20.0
LPDDR4X multiPHY in TSMC (16nm, 12nm,N7, N6)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
879
20.0
LPDDR4X multiPHY Plus in GF (12nm)
The Synopsys LPDDR4 multiPHY is Synopsys’ second generation physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and sy...
880
20.0
LPDDR4x/4 PHY IP for 22nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
881
20.0
LPDDR5/4/4X PHY in GF (12nm)
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package a...
882
20.0
LPDDR5/4/4X PHY in TSMC (16nm, 12nm, N7, N6, N5)
The Synopsys LPDDR5/4/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in-package a...
883
20.0
LPDDR5X/5/4X PHY in Samsung (SF4X, SF2)
The Synopsys LPDDR5X/5/4X PHY is Synopsys’ physical (PHY) layer IP interface solution for ASICs, ASSPs, system-on-chips (SoCs) and system- in- package...
884
20.0
LPDDR5X/5/4X/4 combo PHY at 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
885
20.0
GPIO 1.8V Automotive Grade 1 in GF (22nm)
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
886
20.0
GPIO 1.8V FS Automotive Grade 1 in GF (22nm)
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
887
20.0
Pre-verified Interface IP Subsystems reduce design risk and accelerate time-to-market
Customers are increasingly utilizing third-party standards-based IP in their designs, but face several challenges. With more IP and more complex inter...
888
20.0
Front-end voice processing software package providing enhanced speech intelligibility for voice-enabled devices
ClearVox is a software suite of advanced voice input processing algorithms aimed to enhance voice clarity in any voice-enabled device. Voice has be...
889
20.0
USB 3.0 PHY in TSMC (65nm, 55nm, 40nm, 28nm)
The Synopsys USB-C™ 3.0 and USB 3.0 femtoPHY IP provide designers with a complete physical (PHY) layer IP solution for low-power mobile and consumer a...
890
20.0
DSC Decoder
Display Stream Compression (DSC) standard was announced by Video Electronics Standards Association (VESA) in 2014 for video data compression and has b...
891
20.0
DSC Encoder
Display Stream Compression (DSC) standard was announced by Video Electronics Standards Association (VESA) in 2014 for video data compression and has b...
892
20.0
TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
893
20.0
TSMC 4nm (N4P) 1.2V/1.8V Basekit Libraries, multiple metalstacks
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
894
20.0
TSMC 4nm (N4P) 1.2V/1.8V I3C Libraries
Synopsys I3C I/O library supports a simplified system of connecting and managing multiple sensors in a device. Multiple sensor secondary devices can b...
895
20.0
TSMC 4nm (N4P) 1.2V/1.8V/2.5V Failsafe GPIO Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...
896
20.0
TSMC 4nm (N4P) 1.8V SD/eMMC IO
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
897
20.0
TSMC 4nm (N4P) 1.8V SD/eMMC PHY
Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions. Synopsys SD/eMMC PHY is a hard IP that can be used to...
898
20.0
TSMC 4nm (N4P) 2.5V Basekit Libraries
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
899
20.0
TSMC 4nm (N4P) 2.5V Basekit Libraries, multiple metalstacks
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality, foundation IP, including memory compilers, logic librarie...
900
20.0
TSMC 5nm (N5) 1.2V/1.8V Basekit Libraries
Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their ...