Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5529 IP
551
20.0
Synopsys Memory, Logic, IO for GlobalFounfries 55BCD
Synopsys Foundation IP delivers a comprehensive portfolio of high-speed (HS), high-density (HD), and low-power (LP) Embedded Memories, Logic Libraries...
552
20.0
Synopsys Memory, Logic, IO for GlobalFounfries 55LPe
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
553
20.0
Synopsys Memory, Logic, IO for Huali 40LP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The DesignWare® Due...
554
20.0
Synopsys Memory, Logic, IO for Huali 55LP
Synopsys provides designers with a broad portfolio of high-speed, high-density, and low-power memory compilers and logic libraries. The Synopsys Duet ...
555
20.0
Synopsys Memory, Logic, IO for TSMC 16FF+ GL/LL
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and a full set of logic libraries. Optim...
556
20.0
Synopsys Memory, Logic, IO for TSMC 16FFC
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and a full set of logic libraries. Optim...
557
20.0
Synopsys Memory, Logic, IO for TSMC 22ULL
The Synopsys Foundation IP optimized for the TSMC’s 22nm Ultra Low Leakage (ULL) process provides designers an extensive offering of high-speed, high-...
558
20.0
Synopsys Memory, Logic, IO for TSMC 28HP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. Optimized for TSMC’...
559
20.0
Synopsys Memory, Logic, IO for TSMC 28HPC
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. Optimized for TSMC’...
560
20.0
Synopsys Memory, Logic, IO for TSMC 28HPC+
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. Optimized for TSMC’...
561
20.0
Synopsys Memory, Logic, IO for TSMC 28HPM
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. Optimized for TSMC’...
562
20.0
Synopsys Memory, Logic, IO for TSMC N3A
Synopsys offers system-on-chip (SoC) designers a comprehensive portfolio of high-quality foundation IP, including memory compilers, non-volatile memor...
563
20.0
Synopsys Memory, Logic, IO for TSMC N3P
Synopsys provides SoC designers with an extensive offering of high-quality foundation IP, including memory compilers, non-volatile memory (NVM), logic...
564
20.0
Synopsys Memory, Logic, IO for TSMC N4P
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP, including high-speed (HS), high-density (HD...
565
20.0
Synopsys Memory, Logic, IO for TSMC N5
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP including high-speed, high-density, ultra hi...
566
20.0
Synopsys Memory, Logic, IO for TSMC N5A
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP, including memory compilers, non-volatile me...
567
20.0
Synopsys Memory, Logic, IO for TSMC N6
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP including high-speed (HS), high-density (HD)...
568
20.0
Synopsys Memory, Logic, IO for TSMC N7
Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP including high-speed (HS), high-density (HD)...
569
20.0
Synopsys Memory, Logic, IO for UMC 28HLP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. Optimized for UMC’s...
570
20.0
Synopsys Memory, Logic, IO for UMC 40LP
Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...
571
18.0
14-bit, 8 GSPS IQ DAC Ultra Low Power on GF 22FDX
The ODT-DAC-14B8GIQ-GF22FDX is a high performance dual channel current steering 14-bit DAC that operates as an IQ Pair with an update rate of up to 8G...
572
16.0
Performance AI Accelerator for Edge Computing
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
573
16.0
Performance Efficiency AI Accelerator for Mobile and Edge Devices
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
574
16.0
Lowest Cost and Power AI Accelerator for End Point Devices
The NeuroMosaic Processor (NMP) family is shattering the barriers to deploying ML by delivering a general-purpose architecture and simple programmer’s...
575
15.0
120dB PDM-to-PCM Digital Microphone Interface
The AR36T05 is a soft macro low-power high-performance digital microphone interface modulator IP. The IP converts stereo/mono 1-bit pulse-density modu...
576
15.0
32G UCIe Standard PHY for Samsung
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...
577
15.0
32G UCIe Standard PHY for TSMC
UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance. The Cadenc...
578
15.0
PCI Express (PCIe) 5.0 Controller
Application-optimized, high-performance controller IP for PCIe The Cadence® Controller IP for PCIe 5.0 provides the logic required to integrate a r...
579
15.0
PCIe 3.1 for TSMC
Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging designs. The 8Gb...
580
15.0
VESA DisplayPort DP 1.4a / eDP 1.4b RX Controller ( LINK ) with HDCP 1.4 / 2.3 , MST
Silicon Library's DisplayPort DP 1.4a / eDP 1.4b RX Controller ( LINK ) works with PHY IPs by Silicon Library or customers' PHYs. HDCP 1.4 / 2.3 and o...
581
15.0
VESA DisplayPort DP 1.4a / eDP 1.4b TX Controller ( LINK ) with HDCP 1.4 / 2.3
Silicon Library’s DisplayPort DP1.4a / eDP 1.4b TX Controller works with PHY IPs by Silicon Library or customers' PHYs. HDCP 1.4 / 2.3 and other vari...
582
15.0
SHA-3 Secure Hash Function Core
The SHA-3 is a high-throughput, area-efficient hardware accelerator for the SHA-3 cryptographic hashing functions, compliant to NIST’s FIPS 180-4 and ...
583
15.0
PHY for PCIe 6.0 and CXL for Samsung Automotive
Most advanced PHY and Controller for HPC, AI, ML, Data communications, networking, and storage systems The Cadence® PHY IP for PCI Express® (PCIe®)...
584
15.0
Host / Device LIN controller
Arasan’s LIN Controllers IP– Local Interconnect Network Controllers IPs are compliant to LIN 2.0, 2.1 & 2.2A Specifications. Backward compliant to LIN...
585
15.0
LPDDR5/5X Memory PHY for Samsung
Lowest latency and highest data rates for data-intensive applications The LPDDR PHY IP is comprised of architectural improvements to its highly suc...
586
15.0
SWI3S Manager core IP
Arasan’s SWI3S (SoundWire I3S Interface) Manager Controller Core IP implements the link protocol to communicate in half-duplex fashion to transfer the...
587
14.0
40G Ultralink D2D PHY for GF12LP+
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
588
14.0
40G Ultralink D2D PHY for GF12LP+
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
589
14.0
40G Ultralink D2D PHY for Samsung 7LPP
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
590
14.0
40G Ultralink D2D PHY for Samsung 7LPP
Proprietary chiplet interconnect solution with high-performance, high-bandwidth, and long reach die-to-die link connectivity The Cadence® UltraLink™ ...
591
14.0
10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications
Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...
592
14.0
10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications
Configurable MAC solutions for speeds from 10Gbps to 10Mbps The Cadence 10G/2.5G/1G Multi-Speed Ethernet Controller IP for Automotive Applications is...
593
14.0
10Gbps Multi-Protocol PHY IP
Silicon-proven PHY for PCIe, USB, Ethernet, DisplayPort, and other protocols The PHY IP is designed to deliver high eye-margin at low power for backp...
594
14.0
12-bit, 4 GSPS High Performance IQ ADC in 22nm FD-SOI
The ODT-ADS-12B4GIQ-GF22FDX is an ultra-high performance, time-interleaved, dual channel Swift(tm) ADC designed in a 22nm process. This 12-bit, 4GS...
595
14.0
14-bit, 2.4 GSPS High Performance Swift™ DAC in 16nm CMOS
The ODT-DAC-14B2P4G-16 is a high performance current steering 14-bit 2.4GSPS DAC on 16nm CMOS process that operates at an update rate of up to 2.4GSPS...
596
14.0
Denali Controller for DDR
LPDDR5/4X/4/3 and DDR5/4/3L/3, to 6400Mbps and beyond The Cadence Denali Controller IP for LPDDR5/4X/4/3 and DDR5/4/3L/3 provides low latency and u...
597
14.0
Denali Controller for GDDR6
GDDR6 devices to 16Gbps, 18Gbps, 20Gbps, and beyond The latest, the Cadence Denali Controller IP for GDDR6, provides low latency and very high bandwi...
598
14.0
Denali DDR PHY for TSMC
LPDDR4/3, DDR4/3/3L, up to 4266Mbps The latest Denali high-speed DDR PHY IP is comprised of architectural improvements to its highly successful pre...
599
14.0
Denali High-Speed DDR PHY for UMC
Provides the industry's highest data rates with low-latency througput while balancing power consumption and minimizing area Developed by experience...
600
14.0
Tensilica AI Boost
The Cadence® Tensilica® NNE 110 offers an energy-efficient hardware-based solution that has an AI accelerator of smaller footpri The product architec...