Design & Reuse
Catalog of SIP Cores
System on Chip design resources
5438 IP
851
10.0
Thermal Diode with Base Pin, TSMC N4P
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
852
10.0
Thermal Diode with Base Pin, TSMC N5
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
853
10.0
Thermal Diode with Base Pin, TSMC N6
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
854
10.0
Chip-to-Chip IO Buffer - TSMC CLN4P
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
855
10.0
Chip-to-Chip IO Buffer - TSMC CLN5
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
856
10.0
Chip-to-Chip IO Buffer - TSMC CLN5A
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
857
10.0
Chip-to-Chip IO Buffer - TSMC CLN6FF
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
858
10.0
Chip-to-Chip IO Buffer - TSMC CLN7FF
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
859
10.0
Library of mathematical and floating point (FP) components
Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating point (FP) components th...
860
10.0
Wide Range Frac-N/SSCG PLL - TSMC 7FF
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
861
10.0
Wide Range Integer PLL - GLOBALFOUNDRIES 14LPP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
862
10.0
Wide Range Integer PLL - Samsung 14LPP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
863
10.0
Wide Range Integer PLL - TSMC 12 12FFC
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
864
10.0
Wide Range Integer PLL - TSMC 16 16FFC
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
865
10.0
Wide Range Integer PLL - TSMC 16 CLN16FF+GL
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
866
10.0
Wide Range Integer PLL - TSMC 16 CLN16FF+LL
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
867
10.0
Wide Range Integer PLL - TSMC 22 CLN22ULL/ULP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
868
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPC
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
869
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPC+
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
870
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPM
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
871
10.0
Wide Range Integer PLL - TSMC 40 CLN40G
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
872
10.0
Wide Range Integer PLL - TSMC 7FF
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
873
10.0
Wide Range Multi-Output PLL - TSMC CLN7FF
Analog Bits’ Wide Range Multi-Output PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multipli...
874
10.0
Wide Range PLL - GLOBALFOUNDRIES 65 65G
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
875
10.0
Wide Range PLL - TSMC 6FF
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...
876
10.0
Wide Range PLL - TSMC CLN3P
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...
877
10.0
Wide Range PLL - TSMC N5
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...
878
10.0
Wide Range Programable Integer PLL - TSMC CLN2P
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...
879
10.0
Die-to-Die Controller IP
The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...
880
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
881
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
882
10.0
Differential Clock Receiver - TSMC CLN2P
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
883
10.0
Differential Clock Receiver - TSMC CLN3A
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
884
10.0
Differential Clock Receiver - TSMC CLN3E
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
885
10.0
Differential Clock Receiver to CML - TSMC CLN2P
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
886
10.0
Differential Clock Receiver to CML - TSMC CLN3A
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
887
10.0
Differential Clock Receiver to CML - TSMC CLN3E
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
888
10.0
Differential Clock Receiver to CML - TSMC CLN6FF
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
889
10.0
Differential Clock Reciever - TSMC CLN3P
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
890
10.0
Differential Clock Reciever to CML - TSMC CLN3P
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
891
10.0
Differential Output Buffer - TSMC CLN3P
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a...
892
10.0
Differential Output Buffer - TSMC 6FF
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
893
10.0
Differential Output Buffer - TSMC CLN3E
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
894
10.0
Differential Output Buffer - TSMC CLN3P
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
895
10.0
Differential Output Buffer - TSMC CLN4P
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
896
10.0
Differential Output Buffer - TSMC N5
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
897
10.0
Differential Output Driver - TSMC CLN2P
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...
898
10.0
Differential Receiver - TSMC 7FF
Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...
899
10.0
Differential Signal Receiver - TSMC 6FF
Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...
900
10.0
Differential Signal Receiver - TSMC N5
Analog Bits Differential Signal Receiver macro is a receiver including on-chip termination, and addresses a large portfolio of applications. The Recei...