Design & Reuse
5577 IP
1151
10.0
VESA DSC Encoder and Decoder IP Solutions
Synopsys VESA Display Stream Compression (DSC) Encoder and Decoder IP provides a video compression solution for up to 10K ultra-high-definition displa...
1152
10.0
DesignWare Library contains the essential infrastructure IP for design and verification
The DesignWare Library contains the essential infrastructure IP for design and verification including datapath components, AMBA On-Chip Bus and microc...
1153
10.0
UFS Host Controller IP
Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...
1154
10.0
AHB Multi Fabric
The AHB Fabric provides the necessary infrastructure to connect up to 16 shared AHB Slaves to up to 16 AHB-Lite Bus Masters. The off-the-self configu...
1155
10.0
AHB QSPI Controller with Execute in Place (XIP)
The Quad Serial Peripheral Interface (OSPI) core is a serial data link (SPI) master which controls an external serial FLASH device. Reading and wri...
1156
10.0
Thermal Diode with Base Pin, TSMC 16FFC
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1157
10.0
Thermal Diode with Base Pin, TSMC N3
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1158
10.0
Thermal Diode with Base Pin, TSMC N3EP
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1159
10.0
Thermal Diode with Base Pin, TSMC N4P
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1160
10.0
Thermal Diode with Base Pin, TSMC N5
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1161
10.0
Thermal Diode with Base Pin, TSMC N6
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the rest of the SoC. The...
1162
10.0
Chip-to-Chip IO Buffer - TSMC CLN4P
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
1163
10.0
Chip-to-Chip IO Buffer - TSMC CLN5
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
1164
10.0
Chip-to-Chip IO Buffer - TSMC CLN5A
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
1165
10.0
Chip-to-Chip IO Buffer - TSMC CLN6FF
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
1166
10.0
Chip-to-Chip IO Buffer - TSMC CLN7FF
Analog Bits’ Chip-to-Chip IO Buffer is a general purpose IO for medium-speed per lane transactions in ultra-short reach environments, using single-end...
1167
10.0
Library of mathematical and floating point (FP) components
Optimized for efficient hardware implementation, the Synopsys Foundation Cores include a library of mathematical and floating point (FP) components th...
1168
10.0
Wide Range Frac-N/SSCG PLL - TSMC 7FF
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
1169
10.0
Wide Range Integer PLL - GLOBALFOUNDRIES 14LPP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1170
10.0
Wide Range Integer PLL - Samsung 14LPP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1171
10.0
Wide Range Integer PLL - TSMC 12 12FFC
The programmable Fractional-N divider allows the PLL to lock to an incoming clock source and produce an output clock with a non-integer multiplication...
1172
10.0
Wide Range Integer PLL - TSMC 16 16FFC
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1173
10.0
Wide Range Integer PLL - TSMC 16 CLN16FF+GL
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1174
10.0
Wide Range Integer PLL - TSMC 16 CLN16FF+LL
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1175
10.0
Wide Range Integer PLL - TSMC 22 CLN22ULL/ULP
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1176
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPC
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1177
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPC+
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1178
10.0
Wide Range Integer PLL - TSMC 28 CLN28HPM
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1179
10.0
Wide Range Integer PLL - TSMC 40 CLN40G
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1180
10.0
Wide Range Integer PLL - TSMC 7FF
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1181
10.0
Wide Range Multi-Output PLL - TSMC CLN7FF
Analog Bits’ Wide Range Multi-Output PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multipli...
1182
10.0
Wide Range PLL - GLOBALFOUNDRIES 65 65G
Analog Bits Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to prog...
1183
10.0
Wide Range PLL - TSMC 6FF
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...
1184
10.0
Wide Range PLL - TSMC CLN3P
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...
1185
10.0
Wide Range PLL - TSMC N5
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de-skew and non-integer clock multiplication to pro...
1186
10.0
Wide Range Programable Integer PLL - TSMC CLN2P
Analog Bits’ Wide Range PLL addresses a large portfolio of applications, ranging from simple clock de- skew and non-integer clock multiplication to p...
1187
10.0
Die-to-Die Controller IP
The Synopsys Die-to-Die Controller IP, optimized for latency, bandwidth, power and area, enables efficient inter-die connectivity in server, AI accele...
1188
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in GF (12nm)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
1189
10.0
Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
The Synopsys XSR PHY IP for 112Gbps per lane die-to-die connectivity enables high-bandwidth ultra and extra short reach interfaces in multi-chip modul...
1190
10.0
Differential Clock Receiver - TSMC CLN2P
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
1191
10.0
Differential Clock Receiver - TSMC CLN3A
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
1192
10.0
Differential Clock Receiver - TSMC CLN3E
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
1193
10.0
Differential Clock Receiver to CML - TSMC CLN2P
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
1194
10.0
Differential Clock Receiver to CML - TSMC CLN3A
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
1195
10.0
Differential Clock Receiver to CML - TSMC CLN3E
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
1196
10.0
Differential Clock Receiver to CML - TSMC CLN6FF
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
1197
10.0
Differential Clock Reciever - TSMC CLN3P
Analog Bits’ Differential Clock Receiver macro addresses a large portfolio of applications. The Receiver is designed for digital logic processes and u...
1198
10.0
Differential Clock Reciever to CML - TSMC CLN3P
Analog Bits’ Differential Clock Receiver to CML macro is a receiver including on-chip termination, and addresses a large portfolio of applications req...
1199
10.0
Differential Output Buffer - TSMC CLN3P
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a...
1200
10.0
Differential Output Buffer - TSMC 6FF
Analog Bits’ Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a ...