Design & Reuse
Catalog of SIP Cores
System on Chip design resources
4095 IP
3551
0.118
Standard Cell PowerSlash(TM) Library IP, 7 tracks, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process high density POWERSLASH (POWERSLASH) Core Cell Library....
3552
0.118
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash/HS process 8-Track Generic Core Cell Library....
3553
0.118
Standard Cell PowerSlash(TM) Library IP, 8 tracks, UMC 0.11um eFlash/LL process
UMC 0.11um eFlash/LL process 8-Track Cell Library....
3554
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/HVT process 12-Track POWERSLASH Cell Library (C35)....
3555
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 12-Track high speed Cell POWERSLASH Library (C40)....
3556
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 12-Track Generic Core Cell Library....
3557
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track Generic Core Cell Library with LPLUS (C38)....
3558
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
3559
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/HVT Logic and Mixed-Mode process 7-Track POWERSLASH Kit Cell Library C35....
3560
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library....
3561
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 7-Track POWERSLASH Cell Library....
3562
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Logic process 7-Track POWERSLASH Cell Library....
3563
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/HVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
3564
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 8 tracks, UMC 55nm SP process
UMC 55nm SP/HVT Low-K process POWERSLASH Cell Library....
3565
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/HVT Logic process 9-Track POWERSLASH Core Core Cell Library....
3566
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/HVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
3567
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 65nm LL process
UMC 65nm LL/HVT Low-K Logic process POWERSLASH Core Cell Library....
3568
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 65nm SP process
UMC 65nm SP/HVT process POWERSLASH Cell Library....
3569
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 90nm LL process
UMC 90nm LL/HVT Low-K Logic process Cell Library POWERSLASH Core Cell Library (high density Version)....
3570
0.118
Standard Cell PowerSlash(TM) Library IP, HVT, UMC 90nm SP process
UMC 90nm SP/HVT Low-K process POWERSLASH Core Cell Library libary....
3571
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/LVT process 12-Track POWERSLASH Cell Library (C35)....
3572
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 12-Track high speed POWERSLASH Core Cell Library....
3573
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 12-Track POWERSLASH Core Cell Library....
3574
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Generic Core Cell Library wtih LPLUS (C38)....
3575
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30)....
3576
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
3577
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/LVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35)....
3578
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Low-K Logic process 7-Track POWERSLASH Cell Library....
3579
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 7-Track POWERSLASH Core Cell Library....
3580
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/LVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
3581
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 28nm HLP process
UMC 28nm HLP/LVT Logic process 9-Track POWERSLASH standard Core Cell Library (C35)....
3582
0.118
Standard Cell PowerSlash(TM) Library IP, LVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/LVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
3583
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 12-Track Standard POWERSLASH Core Cell Library (C35)....
3584
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 12-Track high speed POWERSLASH Cell Library (C40)....
3585
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 12-Track POWERSLASH Core Cell Library....
3586
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library....
3587
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LMINUS (C30 RVT)....
3588
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HLP process
UMC 28nm HLP/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library with LPLUS (C38)....
3589
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 28nm HPC process
UMC 28nm HPC/RVT Logic and Mixed-Mode process 7-Track POWERSLASH Cell Library (C35)....
3590
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Low-K Logic process 7-Track POWERSLASH Cell Library....
3591
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 7-Track POWERSLASH Core Cell Library....
3592
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 7 tracks, UMC 55nm SP process
UMC 55nm SP/RVT Logic process 7-Track POWERSLASH Cell Library....
3593
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 8 tracks, UMC 55nm LP process
UMC 55nm LP/RVT Low-K Logic process 8-Track POWERSLASH Core Cell Library....
3594
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 28nm HLP process
UMC 28nm Logic and Mixed-Mode HLP/RVT process 9-Track POWERSLASH Cell Library (C35)....
3595
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, 9 tracks, UMC 40nm LP process
UMC 40nm LP/RVT Logic process 9-Track Standard Cell Library (POWERSLASH Core)....
3596
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process UHS Library POWERSLASH cells....
3597
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process Powerlash Core Cell Library....
3598
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 65nm LL process
UMC 65nm LL/RVT Low-K process Mini-Library POWERSLASHKit....
3599
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 65nm SP process
UMC 65nm SP/RVT Low-K Logic process Powerlash Core Cell Library....
3600
0.118
Standard Cell PowerSlash(TM) Library IP, RVT, UMC 90nm LL process
UMC 90nm LL/RVT Low-K process Low Power POWERSLASH Core Cell Library....