1251 5.0

HDLC & SDLC Protocol Controller The HSDLC IP core implements a controller for the High-Level Data Link Control (HDLC) and the Synchronous Data Link Control (SDLC) protocols. It is ba...

1252 5.0

PDM-to-PCM Conversion with AMBA Interface The AR36T01 is a soft macro low-power digital microphone interface modulator IP. The IP converts stereo/mono 1-bit pulse-density modulated (PDM) bit s...

1253 5.0

Temperature Sensor with Digital Output (High accuracy thermal sensing for reliability and optimisation), TSMC 28HPC+ A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

1254 5.0

Temperature Sensor with Digital Output (High accuracy thermal sensing for reliability and optimisation), UMC 14FFC A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

1255 5.0

SHA-384 and SHA-512 Secure Hash Crypto Engine The SHA-384/512 is a high-throughput, and compact hardware implementation of the SHA-384 and the SHA-512 cryptographic hash functions provisioned by t...

1256 5.0

MIPI Compliant D-PHY TSMC 65LP Arasan delivers you a MIPI D-PHY in the process node and lane configuration you need, conforming to your specific design constraints, with a complete ...

1257 5.0

MIPI I3C Basic Target The I3C-T core implements a versatile MIPI® Improved Inter Integrated Circuit (I3C) Target controller core suitable for any I3C bus topology & complia...

1258 5.0

MIPI SPMI Controller or Target The SPMI-CTRL core implements a highly featured, easy-to-use controller for the MIPI System Power Management Interface (MIPI-SPMI) bus. It supports th...

1259 5.0

VME Slave Controller, bridging VME bus and local bus The VMESmodule is a complete VME Slave Controller core providing a bridge between the VME bus and the local bus. The core contains a VME Slave, a VME ...

1260 5.0

eMMC 5.1 HS400 PHY and I/O Pads in TSMC 28HPC-NS Arasan provides a HS400 compatible PHY that customers can integrate with the HS400 I/O PADs. It is designed to optimize I/O performance with a core v...

1261 5.0

Mobiveil’s P3041 AMC Board AMCP3041 is a Single width and full height AMC card, designed based on Freescale’s Quad core QorIQ series P3041 processor. The powerful Multi-core pro...

1262 5.0

BODA955, H.264, AVC, MVC, VP8, MPEG-1, MPEG-2, MPEG-4, VC-1, AVS, AVS+, H.263, Sorenson video decoder IP for 2K BODA955 is a full HD multi-standard video decoder IP for consumer multimedia products. This IP core is capable of decoding compressed video in a forma...

1263 5.0

CODA988, H.264, AVC, MVC, VP8, MPEG-1, MPEG-2, MPEG-4, VC-1, AVS, AVS+, H.263, Sorenson video codec IP for 2K The CODA980 is a Chips&Media’ enhanced video codec IP that supports AVC/H.264 Highprofile encoding offering improved video quality at lower bitrates. ...

1264 5.0

CODAJ10, 8-bit JPEG Codec IP upto 32Kx32K Chips&Media CODAJ10 is a standalone and cost effective JPEG codec IP that can perform JPEG Baseline decoding and encoding. The CODAJ10 can also suppo...

1265 5.0

CODAJ12V, 8-bit,12-bit JPEG Codec IP upto 32Kx32K Chips&Media CODAJ12V is a standalone and high-performance JPEG codec IP that can perform JPEG Baseline/Extended and MJPEG decoding and encoding. C...

1266 5.0

Voltage Monitor with Digital Output with Shrink, TSMC 28HPC+ The voltage monitor is a low power self-contained IP block specially designed to monitor voltage levels within the core logic voltage domains and prov...

1267 5.0

SPI Master / Slave Controller w/FIFO (APB Bus) The Digital Blocks DB-SPI-MS is a Serial Port Interface (SPI) Controller Verilog IP Core supporting both Master/Slave SPI Bus transfers. The DB-SPI-MS...

1268 5.0

SPI Slave Controller (SPI2APB, SPI2AXI, SPI2AHB Bus) The Digital Blocks DB-SPI-S-AMBA-BRIDGE is a Serial Port Interface (SPI) Controller Verilog IP Core supporting SPI Slave Interface to APB Master Bus. ...

1269 5.0

Process Detector (For DVFS and monitoring process variation), TSMC 28HPC+ An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability on low-geometry CMOS...

1270 5.0

USB 2.0 Hub Controller ...

1271 5.0

USB 2.0 PHY The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...

1272 5.0

eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus) The Digital Blocks DB-eSPI-SPI-MS-AMBA is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting the addition of Enhanced SPI (eSPI...

1273 5.0

TVM - Temperature and Voltage Monitor The ODT-TVM-ULP-001C-7T is an ultra-low power temperature and voltage monitor designed in a 7nm standard process. This IP operates over the entire te...

1274 5.0

TVM - Temperature/Voltage Monitor in 40nm CMOS The ODT-TVM-ULP-001C-40 is an ultra-low power temperature and voltage monitor designed in a standard 40nm CMOS process. The IP operates over the entir...

1275 5.0

PVT Controller, TSMC 28HPC+ The PVT Controller provides a standard digital interface to the embedded Process, Voltage and Temperature (PVT) sensing Sub-System used to increase Sy...

1276 5.0

AXI4 Multi-Channel DMA Controller (fixed 2,4,8,16 DMA Channels) The Digital Blocks DB-DMAC-MC-AXI Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 2, 4, 8, or 16 independent data transfers. The Dire...

1277 4.0

6-bit, 400 MSPS High Performance ADC in 28nm CMOS The ODT-ADS-6B500M-28 is a ultra-high performance current steering 6-bit 400 MSPS ADC in a standard 28nm CMOS process, implemented using Omni Design's...

1278 4.0

10 bit, 2.5 GSPS ADC The ODT-ADS-10B2P5G-T16 is an ultra low-power,high-performance time-interleaved ADC designed in a 16nm CMOS process. This 10-bit, 2.5GSPSADC sup...

1279 4.0

10-bit, 5 MSPS ADC in 12nm CMOS The ODT-ADS-10B5M-12 is an ultra low-power ADC designed in a 12nm process. This 10-bit, 5MSPS ADC supports input signals up to 1 MHz and features 2V d...

1280 4.0

12 bit, 200 MSPS ADC The ODT-ADS-12B200M-16FFCT is an ultra low power ADC designed in a 16nm CMOS process. This 12-bit, 200MSPS ADC supports input signals up to 100MHz an...

1281 4.0

12-bit 250MHz Decimation filter with 43 taps The ODT-DSP-DEC-43T250M-T16 is a 12-bit 250MHz Decimation filter with 43 taps in a 12/16nm CMOS process. The 43 Tap Decimation filter reduces the o...

1282 4.0

12-bit 250MHz interpolation filter with 43 taps The ODT-DSP-INT-43T250M-T16 is a 12-bit 250MHz interpolation filter with 43 taps in a 12/16nm CMOS process. The 43 Tap interpolation filter increas...

1283 4.0

12-bit, 250MSPS ADC on TSMC 7nm The ODT-ADS-12B250M-7T is an ultra-low power ADC designed in a 7nm CMOS process. This 12-bit, 250MSPS ADC supports input signals up to 100MHz and f...

1284 4.0

12-bit, 8 GSPS High Performance Swift™ DAC in 16nm CMOS The ODT-DAC-12B8G-16 is a high performance current steering 12-bit 8GSPS DAC on 16nm CMOS process that operates at an update rate of up to 8GSPS. The ...

1285 4.0

12bit, 1.6 GSPS ADC Ultra Low Power The ODT-ADS-12B1P6G-7T-222 is an ultra high-performance time-interleaved ADC designed in a 16nm CMOS process. This 12-bit, 1.6GSPS ADC supports input...

1286 4.0

14-bit, 300 MSPS Ultra Low Power ADC in 28nm CMOS The ODT-ADP-14B300M-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process, implemented using Omni Design's groundbreaki...

1287 4.0

14-bit, 50 MSPS Ultra Low Power ADC in 28nm CMOS The ODT-ADP-14B50M-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process, implemented using Omni Design's groundbreakin...

1288 4.0

SAS 1-to-1 Speed Bridge with Sandbox The IntelliProp SAS Bridge with Sandbox (IPP-SS115A-BR) design provides SAS compliant connections to a SAS host and a SAS device. The host and device ...

1289 4.0

SAS Initiator Core The IntelliProp IPC-SS105A-HI SAS Initiator Core is an industry standard Serial-SCSI (SAS) initiator core that enables host designs to connect to high...

1290 4.0

SAS Target Core The IntelliProp IPC-SS107A-DT SAS Target Core is an industry standard Serial-SCSI (SAS) Core that enables device applications to connect to high throu...

1291 4.0

SATA "Y" Bridge The IntelliProp SATA "Y" Bridge design (IPP-SA111A-BR) provides SATA compliant connections per SATA-IO 3.3 and a standard SATA interface to access dri...

1292 4.0

SATA "Y" RAID Bridge without NCQ The IntelliProp IPP-SA112A-BR SATA “Y” Bridge with RAID design provides SATA compliant connections and a standard SATA interface that performs RAID0 t...

1293 4.0

SATA 1-to-1 Speed Bridge with Sandbox The IntelliProp SATA 1-to-1 Speed Bridge with Sandbox (IPP-SA110A-BR) design provides SATA compliant connections to a SATA host and a SATA device. The...

1294 4.0

SATA Bridge Platform (Optional: AES, Hardware Datapath) The IntelliProp SATA Bridge Platform is an extensible IP Core which encompasses a SATA Device core, a SATA Host core, along with an embedded processor...

1295 4.0

SATA Device ADCI Core IntelliProp’s SATA Device ADCI core (IPC-SA155A-DT) is an industry standard Serial-ATA (SATA) device interface core that allows companies to build hig...

1296 4.0

SATA Host AHCI Core The IntelliProp SATA Host AHCI (IPC-SA156A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables customers to use high throug...

1297 4.0

SATA Host App Core IntelliProp’s SATA host core (IPC-SA101A-HI) is an industry standard Serial-ATA (SATA) host interface core that enables host application companies to ...

1298 4.0

SATA RAID Core The IntelliProp IPC-BL109A-RD SATA RAID Core is a hardware design block written in HDL that performs RAID 0 operations to provide higher performance a...

1299 4.0

ECC with BCH Algorithm The IntelliProp IPC-BL119A-ZM is a highly configurable IP core that provides a method of extending an information block with extra bits to guard again...

1300 4.0

DDR3/ 3L/ DDR4/ LPDDR4 PHY, 22nm Technology The DDR3, DDR3L, DDR4, and LPDDR4 Combo PHY is designed for easy integration into any System-On-Chip (SOC) and can be seamlessly connected to a third-...