Design & Reuse
4331 IP
2001
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
ULL Single Port SRAM, UMC 40nm LP process....
2002
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Single Port SRAM compiler with LVT peripheral....
2003
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with peripheral LVT and Power Gating....
2004
0.118
Single Port SRAM Compiler IP, UMC 40nm LP process
UMC 40nm LP/LVT Single Port SRAM compiler with Power Gating & row redundancy....
2005
0.118
Single Port SRAM Compiler IP, UMC 55nm CIS process
UMC 55nm CMOS Image Sensor 1P3M process Single Port SRAM memory compiler with peripheral HVT....
2006
0.118
Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM compiler with Power Gating /HVT....
2007
0.118
Single Port SRAM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Single Port SRAM with row redundancy/HVT/Power Gating....
2008
0.118
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55 eHV process Single Port SRAM compiler....
2009
0.118
Single Port SRAM Compiler IP, UMC 55nm eHV process
UMC 55nm HV Single Port SRAM with peripheral LVT....
2010
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process ULL Singal-Port SRAM compiler....
2011
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55um LP Low-K process Singal-Port SRAM compiler with redundancy feature....
2012
0.118
Single Port SRAM Compiler IP, UMC 55nm LP process
UMC 55nm LP Low-K Logic process Synchronous Single Port SRAM memory compiler....
2013
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Synchronous Single Port SRAM using 0.425-Bit cell memory compiler....
2014
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler....
2015
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler....
2016
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler....
2017
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler....
2018
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT & redundancy Single Port SRAM....
2019
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm eFlash with peripheral HVT Single Port SRAM compiler....
2020
0.118
Single Port SRAM Compiler IP, UMC 55nm SP process
UMC 55nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
2021
0.118
Single Port SRAM Compiler IP, UMC 65nm LL process
UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler....
2022
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler....
2023
0.118
Single Port SRAM Compiler IP, UMC 65nm SP process
UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....
2024
0.118
Single Port SRAM Compiler IP, UMC 80nm HV process
UMC 80nm HV process Single Port SRAM memory compiler....
2025
0.118
Single Port SRAM Compiler IP, UMC 90nm CIS process
UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler....
2026
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler....
2027
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler....
2028
0.118
Single Port SRAM Compiler IP, UMC 90nm LL process
UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....
2029
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....
2030
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....
2031
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....
2032
0.118
Single Port SRAM Compiler IP, UMC 90nm SP process
UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....
2033
0.118
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller....
2034
0.118
MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI Transmitter Controller....
2035
0.118
MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller....
2036
0.118
MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller....
2037
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1.5Gbps, UMC 40nm LP Low-K Logic process....
2038
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 55nm SP process
MIPI Receiver 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....
2039
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, UMC 40nm LP Low-K Logic process....
2040
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process....
2041
0.118
MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process, Two Lane....
2042
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1500Mbps combo with CMOS input, UMC 40nm LP Low-K process....
2043
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80~1500MHz with 1-clock lane, 4-data lanes, UMC 40nm LP/RVT/LVT Low-K process....
2044
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1.5Gbps with 1-clock lane, 2-data lanes, UMC 40nm LP/RVT/LVT Low-K process....
2045
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process
MIPI Transmitter 80Mbps~1.5Gbps, UMC 40nm LP/RVT/LVT Low-K process....
2046
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 55nm SP process
MIPI Transmitter 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....
2047
0.118
MIPI D-PHY Transmitter IP, 80Mbps - 1Gbps, UMC 40nm LP process
MIPI Transmitter 80~1000MHz, UMC 40nm LP/RVT Low-K process....
2048
0.118
MIPI M-PHY IP, UMC 40nm LP process
MIPI MPHY 6Gbps/lane, UMC 40nm LP Low-K process....
2049
0.118
Flash Memory Controller IP, Support NAND type Flash memory of 8MB - 2 GB, 24 ECC bits per 512 bytes, Soft IP
NAND-type Flash Controller with AHB interface which supports page size for 512B and 2KB, data width for 8/16-Bit and DMA handshaking protocol....
2050
0.118
Flash Memory Controller IP, Support page sizes of 512, 2K, 4K, 8K and 16K bytes NAND Flash memory, 74bit ECC correction (512 or 1K bytes sectors), Soft IP
Nand Flash Controller with AHB Interface over 74-Bit ECC correction capacity....