IC Mask Design Ltd. IP Cores

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851

1.0

VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell

VeriSilicon SMIC 0.13um 1.2V/3.3V Multiple I/O Cell (05) Library developed by VeriSilicon supports power/ground pads, bi-directional I/O, bidirectiona...

852

1.0

VeriSilicon SMIC 0.13um 1.2V/3.3V OSC IO

Optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13μm Logic Salicide 1.2/3.3V process, S13V25_OSCIO_02 provides a cry...

853

1.0

VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_01 I/O Cell Library

VeriSilicon SMIC 0.13μm SSTL2/SSTL3 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpora...

854

1.0

VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library

VeriSilicon SMIC 0.13μm SSTL2/SSTL18 Combo I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...

855

1.0

VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler, Memory Array Range:256 to 128K Bits

VeriSilicon SMIC 0.13um High-Speed Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0....

856

1.0

VeriSilicon SMIC 0.13um Syn. LP DROM Compiler, Memory Array Range:128 to 1Mega Bits

VeriSilicon SMIC 0.13um synchronous programmable Low Power diffusion ROM compiler optimized for Semiconductor Manufacturing International Corporation ...

857

1.0

VeriSilicon SMIC 0.13um Syn. LP VROM Compiler, Memory Array Range:128 to 1Mega Bits

VeriSilicon SMIC 0.13um Synchronous programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC...

858

1.0

VeriSilicon SMIC 0.13um Synchronous programmable Via1 ROM compiler,Memory Array Range:128 to 1Mega Bits

VeriSilicon SMIC 0.13um Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um L...

859

1.0

VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler,Memory Array Range:512 to 512K Bits

VeriSilicon SMIC 0.13um Ultra-Low-Power Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation (SMI...

860

1.0

VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler, Memory Array Range:128 to 512K Bits

VeriSilicon SMIC 0.13umLL 1P3M High-Density Synchronous Single-Port SRAM compiler optimized for Semiconductor Manufacturing International Corporation ...

861

1.0

VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library

VeriSilicon SMIC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...

862

1.0

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V ANALOGIO_DUP_05 IO Library

VeriSilicon SMIC 0.13um 1.2V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...

863

1.0

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library

VeriSilicon SMIC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporatio...

864

1.0

VeriSilicon SMIC 0.13μm 1.2V/3.3V VPPIO_DUP_01 IO Library

VeriSilicon SMIC 0.13um 1.2V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporat...

865

1.0

VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO Library

VeriSilicon SMIC 0.16um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...

866

1.0

VeriSilicon SMIC 0.18um LL Pro Syn. LP DROM Compiler, Memory Array Range:128 to 2Mega Bits

VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Low Power Diffusion ROM compiler optimized for Semiconductor Manufacturing International Corpo...

867

1.0

VeriSilicon SMIC 0.18um LL Pro Syn. LP VROM Compiler, Memory Array Range:128 to 2Mega Bits

VeriSilicon SMIC 0.18um Low Leakage Process Synchronous Programmable Low Power Via1 ROM compiler optimized for Semiconductor Manufacturing Internation...

868

1.0

VeriSilicon SMIC 0.18um LL Pro. Syn. VROM Compiler, Memory Array Range:128 to 2Mega Bits

VeriSilicon SMIC 0.18um Low Leakage Process Synchronous programmable Via1 ROM compiler optimized for Semiconductor Manufacturing International Corpora...

869

1.0

VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V ANALOGIO_DUP_05 IO Library

VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_DUP_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corpo...

870

1.0

VeriSilicon SMIC 0.18¦Ìm 1.8V/3.3V VPPIO_DUP_01 IO Library

VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_DUP_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporat...

871

1.0

VeriSilicon SMIC 0.18μm 1.8V/3.3V ANALOGIO_05 IO Library

VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...

872

1.0

VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library

VeriSilicon SMIC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for SMIC 0.18μm 1P6M Salicide logic process. This library suppo...

873

1.0

VeriSilicon SMIC 0.18µm 1.8V/3.3V VPPIO_01 IO Library

VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...

874

1.0

VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library

VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....

875

1.0

VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library

VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....

876

1.0

VeriSilicon UMC 0.18μm CF I/O

VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process...

877

1.0

VeriSilicon UMC 0.18μm CF I/O

VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This lib...

878

1.0