5301 1.0

UMC L65SP 65nm Spread Spectrum PLL - 520MHz-2600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5302 1.0

UMC L80G 80nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5303 1.0

UMC L80G 80nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5304 1.0

UMC L80G 80nm Clock Generator PLL - 480MHz-2400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5305 1.0

UMC L80G 80nm DDR DLL - 129MHz-645MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5306 1.0

UMC L80G 80nm DDR DLL - 172MHz-860MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5307 1.0

UMC L80G 80nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5308 1.0

UMC L80G 80nm Deskew PLL - 240MHz-1200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5309 1.0

UMC L80G 80nm Deskew PLL - 480MHz-2400MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5310 1.0

UMC L80G 80nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5311 1.0

UMC L80G 80nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5312 1.0

UMC L80G 80nm Spread Spectrum PLL - 480MHz-2400MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5313 1.0

UMC L80GOD 80nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5314 1.0

UMC L80GOD 80nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5315 1.0

UMC L80GOD 80nm Clock Generator PLL - 600MHz-3000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5316 1.0

UMC L80GOD 80nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5317 1.0

UMC L80GOD 80nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5318 1.0

UMC L80GOD 80nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5319 1.0

UMC L80GOD 80nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5320 1.0

UMC L80GOD 80nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5321 1.0

UMC L80GOD 80nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5322 1.0

UMC L80GOD 80nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5323 1.0

UMC L80GOD 80nm Spread Spectrum PLL - 600MHz-3000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5324 1.0

UMC L90G 90nm Clock Generator PLL - 180MHz-900MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5325 1.0

UMC L90G 90nm Clock Generator PLL - 360MHz-1800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5326 1.0

UMC L90G 90nm Clock Generator PLL - 90MHz-450MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5327 1.0

UMC L90G 90nm DDR DLL - 108MHz-540MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5328 1.0

UMC L90G 90nm DDR DLL - 144MHz-720MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5329 1.0

UMC L90G 90nm Deskew PLL - 180MHz-900MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5330 1.0

UMC L90G 90nm Deskew PLL - 360MHz-1800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5331 1.0

UMC L90G 90nm Deskew PLL - 90MHz-450MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5332 1.0

UMC L90G 90nm Spread Spectrum PLL - 180MHz-900MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5333 1.0

UMC L90G 90nm Spread Spectrum PLL - 360MHz-1800MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5334 1.0

UMC L90G 90nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5335 1.0

UMC L90GOD 90nm Clock Generator PLL - 125MHz-625MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5336 1.0

UMC L90GOD 90nm Clock Generator PLL - 250MHz-1250MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5337 1.0

UMC L90GOD 90nm Clock Generator PLL - 500MHz-2500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5338 1.0

UMC L90GOD 90nm DDR DLL - 144MHz-720MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5339 1.0

UMC L90GOD 90nm DDR DLL - 192MHz-960MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5340 1.0

UMC L90GOD 90nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5341 1.0

UMC L90GOD 90nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5342 1.0

UMC L90GOD 90nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5343 1.0

UMC L90GOD 90nm Spread Spectrum PLL - 125MHz-625MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5344 1.0

UMC L90GOD 90nm Spread Spectrum PLL - 250MHz-1250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5345 1.0

UMC L90GOD 90nm Spread Spectrum PLL - 500MHz-2500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5346 1.0

UMC L90SP 90nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5347 1.0

UMC L90SP 90nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5348 1.0

UMC L90SP 90nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5349 1.0

UMC L90SP 90nm DDR DLL - 60MHz-300MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5350 1.0

UMC L90SP 90nm DDR DLL - 80MHz-400MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...