Design & Reuse
Catalog of SIP Cores
System on Chip design resources
8774 IP
5751
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5752
1.0
TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5753
1.0
TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5754
1.0
TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5755
1.0
TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5756
1.0
TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5757
1.0
TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5758
1.0
TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5759
1.0
TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
5760
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5761
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5762
1.0
TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5763
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5764
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5765
1.0
TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
5766
1.0
TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5767
1.0
TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5768
1.0
TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
5769
1.0
TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5770
1.0
TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5771
1.0
TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
5772
1.0
TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz
The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...
5773
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5774
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5775
1.0
TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
5776
1.0
Stereo PCM to PWM Converter, SMIC 0.18um
The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...
5777
1.0
Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals
The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...
5778
1.0
Super-Speed Plus USB 3.2 Hub Controller
USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...
5779
0.3729
A bridge to convert the slave SPI interface to the master I2C interface and vice versa
The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....
5780
0.3729
A bridge to convert the slave SPI interface to the master UART interface and vice versa
The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....
5781
0.3729
A memory BIST solution which has been optimized for Dolphin memories
Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...
5782
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV
Memory Compilers...
5783
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process GC
Memory Compilers...
5784
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...
5785
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF
Memory Compilers...
5786
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF+GL/FF+LL/FFC
Memory Compilers...
5787
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/FF+
Memory Compilers...
5788
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
Memory Compilers...
5789
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FF/P
Memory Compilers...
5790
0.3729
2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process FFC/FFC+
Memory Compilers...
5791
0.3729
1.2V Temperarure sensor (0.5 degree C accuracy) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5792
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5793
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5794
0.3729
1.2V/1.8V Capable General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5795
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5796
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5797
0.3729
1.2V/1.8V I2C (CDM5A/7A-ESD) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5798
0.3729
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 3nm
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5799
0.3729
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 4nm 4FF/4P
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...
5800
0.3729
1.2V/1.8V/2.5V Capable Fail Safe General Purpose IO (GPIO) (CDM5A/7A-ESD) - TSMC 5nm 5FF
Dolphin's interface IP for standard I/O and specialty I/O delivers ultra high performance for DDR1/2/3/4, LPDDR2/3, DDR PHY, LVDS, LVPECL, I2C, PCI, S...