8651 0.0

eUSB 2.0 PHY in TSMC (N5A, N3A) for Automotive Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

8652 0.0

eUSB2V2 PHY Low voltage USB 2.0 supporting 4.8Gbps eUSB2V2 is primarily a performance enhancement to eUSB2 native mode to provide more bandwidth for peripherals,...

8653 0.0

eUSB2V2 PHY in TSMC (22nm) Synopsys provides designers with silicon-proven, configurable eUSB2 PHYs that are compliant with the USB-Implementers Forum (USB-IF) eUSB2 and USB 2.0...

8654 0.0

Automotive Four Channel (4CH) LVDS Receiver (Deserializer) in TSMC 40LP The AUTO-MXL-LVDS-4CH-RX-T-40LP is a high-performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel ...

8655 0.0

Automotive Four Channel (4CH) LVDS Transmitter (Serializer) in TSMC 40LP The AUTO-MXL-LVDS-4CH-TX-T-40LP is a high-performance 4-channel LVDS transmitter implemented using digital CMOS technology. With a maximum transmit cl...

8656 0.0

Automotive LVDS TX+ (Transmitter) in UMC 40LP The AUTO-MXL-LVDS-SR-TX+ is a high performance 4-channel LVDS transmitter implemented using digital CMOS technology. With a maximum transmit clock fre...

8657 0.0

Automotive MIPI D-PHY CSI-2 TX (Transmitter) in TSMC 28HPC+ The AUTO-MXL-DPHY-CSI-2-TX is a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI Alliance Standard for D-PHY...

8658 0.0

Automotive MIPI D-PHY/LVDS Combo TX (Transmitter) in Samsung 28FDSOI The AUTO-MXL-LVDS-DPHY-DSI-TX-SS-028FDSOI is a combo PHY that consists of a high-frequency low-power, low-cost, source-synchronous, Physical Layer sup...

8659 0.0

JVC Enhancer - JVC Object-Based Gloss Enhancer JVC s Object-Based Gloss Enhancer IP, which is already used in its products, is now available for licensing. Because it has been already proven in the...

8660 0.0

JVC_4K Adoptive Scaler + Super Resolution - Convert Full-HD to High quality 4k2k with super resolution technology JVC s 4k2k Super Resolution IP is now available for licensing. It offers dramatically less jaggy and Full-HD to 4k2k up-conversion with high performan...

8661 0.0

LVDS TX+ (Transmitter) in UMC 40LP The MXL-LVDS-SR-TX+ is a high performance 4-channel LVDS transmitter implemented using digital CMOS technology. With a maximum transmit clock frequenc...

8662 0.0

NVM EEPROM NeoEE in DBHitek(180nm, 90nm) eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...

8663 0.0

NVM OTP in TSMC N5A for Automotive One Time Programmable (OTP) Non-Volatile Memory (NVM) IP solution, based on XHF architecture, is designed to meet the challenges of advanced FinFET de...

8664 0.0

PVT - Process, Voltage, and Temperature Monitor with Interrupt 7nm/6nm The ODT-PVT-ULP-001C-7 is an ultra-low power temperature, voltage and process monitor designed in a 7nm/6nm CMOS process. This IP operates over the en...

8665 0.0

1Watts, 2.1-2.8GHz Power Amplifier ...

8666 0.0

Switch with 0/20dB Attenuator ...

8667 0.0

PWM to Class D Amplifier Power Stage, SMIC 0.13um The AR35S13A is a highly efficient H-BTL audio output driver IP for Class-D amplifier application. The IP is capable of providing 0.1% THD+N performan...

8668 0.0

AXI / AHB / APB - SPI Flash Memory Controller - Octal/Quad/Dual/Single SPI I/O - CPU access to Flash and optional Execute-in-Place (XIP), Boot, DMA The Digital Blocks DB-SPI-FLASH-CTRL is a Serial Peripheral Interface (SPI) Controller Verilog IP Core supporting access to Single/Dual/Quad SPI Flash...

8669 0.0

AXI Bus Display Controller The Digital Blocks DB9000AXI3 Display Controller IP Core interfaces a microprocessor and frame buffer memory via the AMBA AXI Protocol Interconnect to...

8670 0.0

AXI Interconnect Fabric The AXI Interconnect provides the necessary infrastructure to connect as many as 8 shared AXI Slaves to as many as 4 AXI Bus Masters. AXI defines 5...

8671 0.0

AXI Interface Core Rambus’s AXI Interface Core is designed for use in applications requiring ARM’s Advanced eXtensible Interface (AXI). The core accepts write and rea...

8672 0.0

AXI Multilayer Interconnect The AXI-MLIC is an AMBA® AXI bus interconnect fabric connecting an arbitrary number of bus masters to an arbitrary number of slaves. The AXI fabric ...

8673 0.0

AXI Subsystem The AXI-SBS is an integrated, verified, AMBA® compliant hardware/software system ready for embedded applications using processors with AXI4 interfaces...

8674 0.0

AXI to AHB Lite Bus Bridge The AHB Lite to AXI Bridge translates an AHB Lite bus transaction (read or write) to an AXI bus transaction. It is expected that the AXI clock and th...

8675 0.0

AXI to APB Bridge The AXI2APB implements a bridge between AXI and APB buses, allowing the connection of peripherals with an APB interface to an AXI bus. The highly con...

8676 0.0

AXI to APB Bus Bridge The AXI to APB Bridge translates an AXI bus transaction (read or write) to an APB bus transaction. This is accomplished via two state machines – one ...

8677 0.0

AXI4 Memory Map to AXI4-Stream Bridge Digital Blocks DB-AXI4-MM-TO-AXI4-STREAM-BRIDGE Verilog RTL IP Core accepts AXI4 Memory Map address, control, and data input, converts the address to ...

8678 0.0

AXI64 5 Port SRAM Controller The AXI 5-Master component SRAM Controller provides 5 AXI 64-bit Master components with low-wait-state access to a single internal 64-bit SRAM resourc...

8679 0.0

CYB-SM3 Cryptographic Hash Function SM3 is a hash algorithm initially published by the Office of State Commercial Cryptography Administration (OSCCA) of SCA in 2010, then as a China indu...

8680 0.0

CYB-SM4 Block Cipher Algorithm SM4 (former name “SMS4”) is a cryptographic standard published by the Office of State Commercial Cryptography Administration (OSCCA) of SCA as an indu...

8681 0.0

Synopsys 112G PHY for TSMC N7 Synopsys IP Multi-Protocol 112G PHY IP is part of Synopsys’ high- performance multi-rate transceiver portfolio for high-end networking and high perfor...

8682 0.0

Synopsys 32G PHY NCS for TSMC N5 The multi-lane Synopsys Multi-Protocol 32G PHY IP is part of Synopsys’ high-performance multi-rate transceiver portfolio for high-end networking and ...

8683 0.0

Synopsys Auto-Grade MIPI D-PHY Tx for TSMC N7 Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

8684 0.0

Synopsys Complete UFS 5.0 solution with UniPro 3.0 + M PHY v6.0 enables Gear6B 46.7 Gb/s, reduced power, and high bandwidth scalability The Synopsys Universal Flash Storage (UFS) Host Controller IP is a standardbased serial interface engine for implementing the JEDEC UFS interface in c...

8685 0.0

Synopsys High speed M PHY v6.0 delivers 46.7 Gb/s Gear6B, enhanced channel robustness, low power modes, and integration with UniPro/UFS The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v6.0 specification, supports speeds up to 46.7 Gbps per lane. The IP ...

8686 0.0

Synopsys High-Speed Test IO in TSMC N3P AI and HPC are transitioning to chiplet-based designs to overcome scaling limits of monolithic SoCs and achieve superior performance. While heterogene...

8687 0.0

Synopsys Memory, Logic, IO for DB HiTek 180nm Synopsys provides designers with high-speed, high-density and low-power memory compilers for the DB HiTek 180nm process technology. The Synopsys Embed...

8688 0.0

Synopsys Memory, Logic, IO for GlobalFounfries 22FDX Synopsys provides designers with a broad portfolio of high-speed (HS), high-density (HD), high-density low-leakage (HD-LL) and low-power memory compil...

8689 0.0

Synopsys Memory, Logic, IO for GlobalFounfries 22FDX+ Synopsys provides designers with a broad portfolio of Foundation IP that includes high-speed (HS), high-density (HD), and low-power (LP) memory compil...

8690 0.0

Synopsys Memory, Logic, IO for GlobalFounfries 40LP Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...

8691 0.0

Synopsys Memory, Logic, IO for GlobalFounfries 55BCD Synopsys Foundation IP delivers a comprehensive portfolio of high-speed (HS), high-density (HD), and low-power (LP) Embedded Memories, Logic Libraries...

8692 0.0

Synopsys Memory, Logic, IO for GlobalFounfries 55LPe Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...

8693 0.0

Synopsys Memory, Logic, IO for Huali 40LP Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The DesignWare® Due...

8694 0.0

Synopsys Memory, Logic, IO for Huali 55LP Synopsys provides designers with a broad portfolio of high-speed, high-density, and low-power memory compilers and logic libraries. The Synopsys Duet ...

8695 0.0

Synopsys Memory, Logic, IO for Intel 16 Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP including high-speed (HS), ultra-high-densit...

8696 0.0

Synopsys Memory, Logic, IO for Intel 18A Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP, including memory compilers, logic libraries...

8697 0.0

Synopsys Memory, Logic, IO for Samsung 8LPU Synopsys provides system-on-chip (SoC) designers with an extensive offering of high-quality foundation IP, including memory compilers, logic libraries...

8698 0.0

Synopsys Memory, Logic, IO for SMIC 40LL Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...

8699 0.0

Synopsys Memory, Logic, IO for SMIC 65LL Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and logic libraries. The Synopsys Duet P...

8700 0.0

Synopsys Memory, Logic, IO for TSMC 16FF+ GL/LL Synopsys provides designers with a broad portfolio of high-speed, high-density and low-power memory compilers and a full set of logic libraries. Optim...