1601 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP/RVT Low-K Logic process synchronous Low Power (PG-DC) using 0.425-Bit cell Single Port SRAM memory compiler....

1602 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP/RVT+HVT Low-K Logic process synchronous high density Single Port SRAM memory compiler....

1603 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low-K Logic process synchronous ultra high speed Single Port SRAM memory compiler....

1604 0.118

Single Port SRAM Compiler IP, UMC 55nm SP process UMC 55nm SP Low_K Logic process synchronous high density Single Port SRAM memory compiler....

1605 0.118

Single Port SRAM Compiler IP, UMC 65nm LL process UMC 65nm LL/RVT Low-K Logic process 1-port high density memory compiler....

1606 0.118

Single Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm standard performance Logic process synchronous extra high speed Single Port SRAM memory compiler....

1607 0.118

Single Port SRAM Compiler IP, UMC 65nm SP process UMC 65nm SP Low-K Logic process synchronous high density Single Port SRAM memory compiler....

1608 0.118

Single Port SRAM Compiler IP, UMC 80nm HV process UMC 80nm HV process Single Port SRAM memory compiler....

1609 0.118

Single Port SRAM Compiler IP, UMC 90nm CIS process UMC 90nm CMOS Image Sensor process 1P3M Single Port SRAM compiler....

1610 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm LL Low-K RVT process synchronous Single Port SRAM memory compiler....

1611 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm LL/RVT Synchronous high density Single Port SRAM memory compiler....

1612 0.118

Single Port SRAM Compiler IP, UMC 90nm LL process UMC 90nm Logic process low leakage devices synchronous Low Power Single Port hihg density memory compiler....

1613 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm Logic process SP/ Low-K synchronous high density Single Port SRAM memory compiler....

1614 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT/ Low-K process synchronous ultra high speed SRAM compiler....

1615 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP/RVT Low-K Logic process high density Single Port 6T SRAM Memory Complier....

1616 0.118

Single Port SRAM Compiler IP, UMC 90nm SP process UMC 90nm SP Low-K Logic process Low Power synchronous high density Single Port SRAM memory compiler....

1617 0.118

MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI CSI Receiver Controller....

1618 0.118

MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP MIPI Transmitter Controller....

1619 0.118

MIPI Controller IP, DSI Host, Soft IP DSI Host Controller....

1620 0.118

MIPI Controller IP, DSI Peripheral, Soft IP MIPI DSI Peripheral Controller....

1621 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1.5Gbps, UMC 40nm LP Low-K Logic process....

1622 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Receiver 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

1623 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, UMC 40nm LP Low-K Logic process....

1624 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process....

1625 0.118

MIPI D-PHY Receiver IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Receiver 80Mbps-1Gbps, Combo PHY for MIPI & HiSPi & LVDS & SubLVDS, UMC 40nm LP Low-K Logic process, Two Lane....

1626 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1500Mbps combo with CMOS input, UMC 40nm LP Low-K process....

1627 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80~1500MHz with 1-clock lane, 4-data lanes, UMC 40nm LP/RVT/LVT Low-K process....

1628 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1.5Gbps with 1-clock lane, 2-data lanes, UMC 40nm LP/RVT/LVT Low-K process....

1629 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 40nm LP process MIPI Transmitter 80Mbps~1.5Gbps, UMC 40nm LP/RVT/LVT Low-K process....

1630 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1.5Gbps, UMC 55nm SP process MIPI Transmitter 80~1500MHz, UMC 55nm SP/RVT Low-K Logic process....

1631 0.118

MIPI D-PHY Transmitter IP, 80Mbps - 1Gbps, UMC 40nm LP process MIPI Transmitter 80~1000MHz, UMC 40nm LP/RVT Low-K process....

1632 0.118

MIPI M-PHY IP, UMC 40nm LP process MIPI MPHY 6Gbps/lane, UMC 40nm LP Low-K process....

1633 0.118

Flash Memory Controller IP, Support NAND type Flash memory of 8MB - 2 GB, 24 ECC bits per 512 bytes, Soft IP NAND-type Flash Controller with AHB interface which supports page size for 512B and 2KB, data width for 8/16-Bit and DMA handshaking protocol....

1634 0.118

Flash Memory Controller IP, Support page sizes of 512, 2K, 4K, 8K and 16K bytes NAND Flash memory, 74bit ECC correction (512 or 1K bytes sectors), Soft IP Nand Flash Controller with AHB Interface over 74-Bit ECC correction capacity....

1635 0.118

DLL (All Digital) IP, Input: 200MHz - 533MHz, Output: 200MHz - 533MHz, UMC 65nm LP process Input 200M-533MHz, output 200M-533MHz, all digital DLL with two-channel DQS delay range, UMC 65nm LP/RVT Low-K Logic process....

1636 0.118

DLL (All Digital) IP, Input: 300MHz - 600MHz, Input: 300MHz - 600MHz, UMC 40nm LP process An ADDLL operate at 300MHz~600MHz.Output 0-180 degree Phase adjustment range.Delay adjustment resolution <= 1% of reference clockUMC 40nm LP/RVT Logic...

1637 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz (Programmable output delay stepping with 1/64 clock period), UMC 55nm SP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with per 1/64UI programmable delay, UMC 55nm SP/RVT Low-K Logic process....

1638 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 40nm LP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 40nm LP/RVT Low-K Logic process....

1639 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 55nm LP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 55nm LP/RVT Low-K Logic process....

1640 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 55nm SP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 55nm SP/RVT Low-K Logic process....

1641 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 65nm LP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 65nm LP/RVT Low-K Logic process....

1642 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 65nm SP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 65nm SP/RVT Low-K Logic process....

1643 0.118

DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 90nm SP process Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 90nm SP/RVT Low-K Logic process....

1644 0.118

DLL (All Digital) IP, Input: 360MHz - 720MHz, Output: 360MHz - 720MHz, UMC 40nm LP process Input 360M-720MHz, output 360M-720MHz, DLL, Output 0-180 degree Phase adjustment range. UMC 40nm LP process....

1645 0.118

DLL (All Digital) IP, Input: 5MHz - 70MHz, Output: 5MHz - 70MHz, UMC 40nm LP process An ADDLL operate at 5MHz~70MHz.Output produce a rising/falling edge delay tuning clock.UMC 40nm LP/RVT Logic process....

1646 0.118

PLL (All Digital, Spread Spectrum) IP, Input: 25MHz, Output: 5GHz, UMC 0.11um HS/AE process 5GHz SSCG with 25MHz reference clock, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....

1647 0.118

PLL (All Digital, Spread Spectrum) IP, Input: 25MHz, Output: 5GHz, UMC 0.11um HS/AE process 5GHz SSCG with 25MHz reference clock, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....

1648 0.118

PLL (All Digital, Spread Spectrum) IP, Input: clock range:10MHz - 1280MHz, Output: 15.625MHz - 2GHz, Spreading depth: -10%(max), Spreading Freq: 20KHz to 300KHz, UMC 0.11um HS/AE process Input clock range:10M ~ 1280MHz, output clock range:15.625M ~ 2000MHz wide-range SSCG, UMC 0.11um HS/AE (AL Advanced Enhancement) 2T Logic process....

1649 0.118

PLL (De-Skew) IP, Input: 15MHz - 110MHz, Output: 15MHz - 110MHz, UMC 0.13um HS/FSG process Input 15M-110MHz, output 15M-110MHz, De-skew PLL with 0.9V~1.32V power supply range, UMC 0.13um HS/FSG Logic process....

1650 0.118

PLL (Frequency Synthesizer) IP, Input: 10MHz - 200MHz, Output: 20MHz - 300MHz, HJTC 0.18um eFlash/G2 process Input 10M-200MHz, output 20M-300MHz, frequency synthesizable PLL, HJTC 0.18 eFlash process....