1901 0.118

ROM Compiler IP, UMC 65nm SP process UMC 65nm SPRVT Logic process synchronous VIA1 ROM memory compiler....

1902 0.118

ROM Compiler IP, UMC 90nm CIS process UMC 90nm CMOS Image Sensor process 1P3M Via ROM compiler....

1903 0.118

ROM Compiler IP, UMC 90nm LL process UMC 90nm Logic process low leakage synchronous Contact VIA1 memory compiler....

1904 0.118

ROM Compiler IP, UMC 90nm SP process UMC 90nm/ Low-K SP/RVT VIA1 Programmable ROM compiler....

1905 0.118

ROM Compiler IP, Via-1 type, UMC 0.13um SP/FSG process UMC 0.13um SP/FSG Logic process high density synchronous Via-1 ROM memory compiler....

1906 0.118

Controller IP, SPI Flash controller, Soft IP Flash Controller with SPI Interface....

1907 0.118

Controller IP, System Power/Clock Management, Soft IP The system control unit, is designed to provide a power and clock management functions for System-on-a-Chip (SoC) to handle operations of the chip tha...

1908 0.118

Touch Controller IP, Soft IP A touch screen controller provides a machine and controlling signals to handle ADC conversion and the panel deriver switching for stylus point positio...

1909 0.118

Power on Reset IP, Input: 1.0V, UMC 65nm SP process Vrr=0.67V, Vfr=0.62, input 1.0V, Core type, Power On Reset, UMC 65nm SP/RVT Low-K process....

1910 0.118

Power on Reset IP, Input: 1.0V, UMC 90nm SP process Vrr=0.67V Vfr=0.63V, input 1.0V, Core type, Power On Reset (with Self-Test Circuit), UMC 90nm SP/RVT Logic Low-K process....

1911 0.118

Power on Reset IP, Input: 1.0V, Vrr=0.67V, Vfr=0.62V, UMC 55nm SP process Vrr=0.67V, Vfr=0.62V, input 1.0V, Core type, Power On Reset, UMC 55nm SP/RVT Low-K process....

1912 0.118

Power on Reset IP, Input: 1.0V/3.3V, UMC 40nm LP process Vrr=2.33V Vfr=2.26V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request, UMC 40nm LP/RVT Low-K Logic process....

1913 0.118

Power on Reset IP, Input: 1.0V/3.3V, UMC 90nm SP process Vrr=2V Vfr=1.95V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request by ASAL, UMC 90nm SP/RVT Low-K Logic process....

1914 0.118

Power on Reset IP, Input: 1.1V, UMC 40nm LP process Vrr=0.8V, Vfr=0.65V, input VCC=1.1V, 1.1V Power On Reset, UMC 40nm LP/RVT Low-K Logic process....

1915 0.118

Power on Reset IP, Input: 1.2V, UMC 0.11um HS/AE process Power on reset(POR) block, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....

1916 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process....

1917 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....

1918 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....

1919 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=11.7uA, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....

1920 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um LL/FSG process Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=10.7uA, Core type, Power On Reset, UMC 0.13um LL Logic(FSG) process....

1921 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....

1922 0.118

Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....

1923 0.118

Power on Reset IP, Input: 1.2V, UMC 90nm LL process Vrr=0.7V, Vfr=0.65V, input VCCK=1.2V, Core Type Power On Reset, UMC 90nm Logic/Mixed-Mode LL/RVT Low-K process....

1924 0.118

Power on Reset IP, Input: 1.2V, Vrr=0.8V, Vfr=0.65V, UMC 55nm LP process Vrr=0.8V, Vfr=0.65V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....

1925 0.118

Power on Reset IP, Input: 1.2V, Vrr=Vfr=0.8V, UMC 55nm LP process Vrr=Vfr=0.8V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....

1926 0.118

Power on Reset IP, Input: 1.5V - 3.9V, UMC 55nm SP process 3.9~1.5V (RTC Core Cell Library operating voltage+), Rise-relax voltage (Vrr), min. 1.6V (1.6V~2.3V) Power On Reset, UMC 55nm SP/RVT Low-K Logic proce...

1927 0.118

Power on Reset IP, Input: 1.5V, UMC 0.15um SP process Vrr=1.1V Vfr=0.95V, VCC=1.5V, B-type IO., Power On Reset, UMC 0.15um SP Logic process....

1928 0.118

Power on Reset IP, Input: 1.8V, HJTC 0.18um eFlash/G2 process Vrr=1.35V, Vfr=1.25V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....

1929 0.118

Power on Reset IP, Input: 1.8V, Output: 1.8432MHz, HJTC 0.18um eFlash/G2 process Vrr=1.4V, Vfr=1.15V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....

1930 0.118

Power on Reset IP, Input: 1.8V, UMC 0.153um MS process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.153um Mixed-Mode/Logic process....

1931 0.118

Power on Reset IP, Input: 1.8V, UMC 0.162um Logic process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.162um Logic process....

1932 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um eFlash/G2 process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um e-Flash process....

1933 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, B type IO, Power On Reset, UMC 0.18um GII Logic process....

1934 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, C type IO, Power On Reset, UMC 0.18um GII Logic process....

1935 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, D type IO, Power On Reset, UMC 0.18um GII Logic process....

1936 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, Core type, Power On Reset, UMC 0.18um GII Logic process....

1937 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process FXPORD730HA0A 0.18um power on reset at the corner of D-type IO Vrr=1.2V Vfr=1V, Power On Reset, UMC 0.18um GII Logic process....

1938 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....

1939 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.18um GII Logic process....

1940 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....

1941 0.118

Power on Reset IP, Input: 1.8V, UMC 0.18um LL process Vrr=1.2V Vfr=1.1V, VCC=1.8V, Ivcc=12.2uA, Core type, Power On Reset, UMC 0.18um LL Logic process....

1942 0.118

Power on Reset IP, Input: 2.5V - 3.3V, UMC 0.13um HS/FSG process 2.5V~3.3V POR, UMC 0.13um HS/FSG Logic process....

1943 0.118

Power on Reset IP, Input: 2.5V, UMC 0.25um process Vrr=1.8V Vfr=1.6V, VCC=2.5V, Ivcc=13.4uA, B type IO, Power On Reset, UMC 0.25um Logic process....

1944 0.118

Power on Reset IP, Input: 2.5V, UMC 0.25um MS process Power on Reset circuit tolerant with 0.25um, 2.5V MMC and Logic process VCC=2.5V, B type IO, Power On Reset, UMC 0.25um Logic process....

1945 0.118

Power on Reset IP, Input: 2.5V, UMC 40nm LP process 2.5V Power On Reset, Vrr=1.90 without Vfr, UMC 40nm LP/RVT Low-K Logic process....

1946 0.118

Power on Reset IP, Input: 2.5V, UMC 40nm LP process Vrr=2.0V Vfr=1.9V, VCC3I=2.5V, 2.5V Power On Reset, special request, UMC 40nm LP/RVT Low-K Logic process....

1947 0.118

Power on Reset IP, Input: 2.5V/3.3V, HJTC 0.18um eFlash/G2 process Vrr=2V Vfr=1.95V, input VCCK=1.8V VCC3IO=3.3V, 3.3V Power On Reset, special request by Hisilicon, HJTC 0.18um 2P6M eFlash process....

1948 0.118

Power on Reset IP, Input: 3.3V, UMC 0.11um eFlash process Vrr=2.2V, Vfr=2.0V, A type IO, 3.3V Power On Reset, UMC 0.11um AL eFlash process....

1949 0.118

Power on Reset IP, Input: 3.3V, UMC 0.11um HS/AE process Vrr=2.2V Vfr=2.0V, B type IO, input VCCK=1.2V VCC3IO=3.3V, 3.3V Power On Reset, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....

1950 0.118

Power on Reset IP, Input: 3.3V, UMC 0.11um HS/AE process Vrr=2.2V, Vfr=2.0V, A type IO, 3.3V Power On Reset, UMC 0.11um HS/AE (AL Advanced Enhancement) Logic process....