151 0.118

1.8V 10bit 80MSPS Dual-Channel Pipelined ADC; UMC 0.153um Logic Process_x005F_x005F_x005F_x000D_ 1.8V 10bit 80MSPS Dual-Channel Pipelined ADC; UMC 0.153um Logic Process...

152 0.118

1.8V 10bit 80MSPS Pipelined ADC; UMC 0.153um Logic Process 1.8V 10bit 80MSPS Pipelined ADC; UMC 0.153um Logic Process...

153 0.118

1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process 1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process...

154 0.118

0.9V/1.8V 9Bits 125MSPS Pipelined ADC; UMC 28nm HPC+, LowK, Logic Process 0.9V/1.8V 9Bits 125MSPS Pipelined ADC; UMC 28nm HPC+, LowK, Logic Process...

155 0.118

D/A Converter IP, 10 bits, 1MHz, UMC 0.153um Logic process 10-Bit 1MHz Voltage Output R-2R Digital-to-Analog converter, UMC 0.153um Logic process....

156 0.118

D/A Converter IP, 10 bits, 2.5Msps, HJTC 0.18um Logic process 10-Bit 2.5MSPS current Digital-to-Analog converter, HJ 0.18um Logic process....

157 0.118

D/A Converter IP, 16 bits, 96Ksps, UMC 0.25um Logic process 16-Bit 96KSPS voltage output stereo-line Digital-to-Analog converter, UMC 0.25um Logic process....

158 0.118

A/D Converter IP, 10 bits, 300Ksps, UMC 0.35um Logic process 10-Bit 300KSPS single End Analog-to-Digital converter, UMC 0.35um Logic process....

159 0.118

A/D Converter IP, 10 bits, 30Msps, UMC 0.25um Logic process 10-Bit 30MSPS Differential Analog-to-Digital converter, UMC 0.25um Logic process....

160 0.118

A/D Converter IP, 10 bits, 400Ksps, UMC 0.25um Logic process 10-Bit 400KSPS single-end Analog-to-Digital converter, UMC 0.25um Logic process....

161 0.118

A/D Converter IP, 18 bits, 96Ksps, UMC 0.25um Logic process 18-Bit 96KSPS differential Sigma-Delta Analog-to-Digital converter, UMC 0.25um Logic process....

162 0.118

10 bit 1MSPS A/D Converter; UMC 40 nm LP/RVT Low-K Logic Process 10 bit 1MSPS A/D Converter; UMC 40 nm LP/RVT Low-K Logic Process...

163 0.118

10 bit 1MSPS A/D Converter; UMC 40 nm LP/RVT Low-K Logic Process 10 bit 1MSPS A/D Converter; UMC 40 nm LP/RVT Low-K Logic Process...

164 0.118

10 lane FXSLVTX030HH0L bias circuit ; UMC 40nm LP/RVT Logic Process 10 lane FXSLVTX030HH0L bias circuit ; UMC 40nm LP/RVT Logic Process...

165 0.118

10bit 250MSPS Current-steering Video D/A Converter; UMC 0.11um HS/FSG Logic Process 10bit 250MSPS Current-steering Video D/A Converter; UMC 0.11um HS/FSG Logic Process...

166 0.118

40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process 40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process...

167 0.118

12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 0.13um LL/RVT FSG Logic Process 12bit 1MSPS SAR ADC with 8-1 Mux (All C-type) ; UMC 0.13um LL/RVT FSG Logic Process...

168 0.118

28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process 28Gb/s 4 lane high-speed SerDes; UMC 28nm HPC Logic Std/HS process...

169 0.118

28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library 28nm Logic and Mixed-Mode HLP/RVT Process Multi-Voltage BOAC I/O Cell library...

170 0.118

28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library 28nm Logic and Mixed-Mode HPC/RVT Process Multi-Voltage BOAC I/O Cell library...

171 0.118

1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...

172 0.118

1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process 1:2 DDR2/DDR1/MDDR combo PHY; UMC 0.11um HS/Cu Logic Process...

173 0.118

Band Gap IP, Input: 1.2V - 1.98V, VBG=0.615V, UMC 0.153um Logic process Input 1.2V-1.98V, VBG=0.615V bandgap, UMC 0.153um Logic process....

174 0.118

Band Gap IP, Input: 2.0V - 3.3V, VBG=1.23V, UMC 0.25um Logic process VBG=1.23V, VCCAH=3.3V, VCCAH_min=2.0V, Ivccah=25uA, UMC 0.25um Logic process....

175 0.118

Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process Data block of 1:2 DDR2-PHY ; UMC 0.11um HS/AE (AL Advanced Enhancement) Logic Process...

176 0.118

Data Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process Data Block of DDR3 Combo PHY for DIMM version ; UMC 55nm LP/RVT LowK Logic Process...

177 0.118

Data Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process Data Block of DDR3 Combo PHY for DIMM version ; UMC 55nm SP/RVT LowK Logic Process...

178 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Logic Process...

179 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant with DFI spec); UMC 40nm LP LowK Logic Process...

180 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process...

181 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm LP/RVT LowK Logic Process...

182 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process...

183 0.118

Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application; UMC 55nm SP/RVT LowK Logic Process...

184 0.118

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for copper pillar bump Flip chip version ; UMC 40nm LP LowK Logic Process Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for copper pillar bump Flip chip version ; UMC 40nm LP LowK Logic Process...

185 0.118

Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process Data Block of DDR3/DDR4/LPDDR2/LPDDR3 Combo PHY for Solder bump Flip chip version ; UMC 40nm LP LowK Logic Process...

186 0.118

SATA II PHY IP, Support SATA Gen1 1.5Gb/s and SATA Gen2 3.0Gb/s, UMC 0.18um Logic process Single channel serial ATA PHY layer compliant with SATA spec. of 3.0Gbps....

187 0.118

RC Oscillator IP, Output: 10KHz, UMC 0.35um Logic process Sub-low current with external-C, frequency 10KHz, VCCA=2.0V~3.3V, Ivcca<10uA....

188 0.118

RC Oscillator IP, Output: 27.5MHz, UMC 0.35um Logic process 27.5MHz trimmable RC Oscillator, UMC 0.35um Logic process....

189 0.118

RC Oscillator IP, Output: 30KHz - 300KHz, UMC 0.25um Logic process External-C, frequency 30KHz~300KHz, VCCA=2.0V~3.0V, UMC 0.25um Logic process....

190 0.118

DC-DC IP, Input: 3.3V, Output: +/- 12.5V / +6V, UMC 0.35um Logic process Three pulse width modulation, boosting voltage from 3.3V to +/-12.5V, and +6V, Ivcca=450uA @ Idrive=0....

191 0.118

DC-DC IP, Input: 3.3V, Output: 5V/50mA, UMC 0.25um Logic process Pulse width modulation, boosting voltage from 3.3V to 5V, 50mA driving capability, Ivcca=150uA @ Idrive=0....

192 0.118

PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process. PCIE Gen.II PHY; UMC 65nm LP/RVT LowK Logic Process....

193 0.118

ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process ID PAD of OTG USB2.0 ; XIP 55LP/RVT LowK Logic Process...

194 0.118

DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY CMD/ADDR BLOCK ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

195 0.118

DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process DDR1/MDDR PHY Data block ; UMC 55nm SP/RVT with 2.5V device LowK Logic Process...

196 0.118

DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process DDR2 PHY Command/Address Block (for Chip Application); UMC 0.13um HS/FSG Logic Process...

197 0.118

DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process DDR2 PHY Command/Address Block ; UMC 0.13um HS/FSG Logic Process...

198 0.118

DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process DDR2 PHY compensation block for 171 series (non BOAC); UMC 0.13um HS/FSG Logic Process...

199 0.118

DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process DDR2 PHY Compensation block; UMC 55nm SP/RVT LowK Logic Process...

200 0.118

DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process DDR2 PHY compensation block; UMC 65nm SP/RVT LowK Logic Process...