Design & Reuse
3908 IP
351
70.0
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
352
70.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
353
60.0
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology
IGAHBMV03A, TSMC CLN16FFC HBM PHY with CoWoS technology...
354
50.0
512x8 Bits OTP (One-Time Programmable) IP, TSM- 12FFC 0.8V/1.8V Process
The ATO00512X8TS012FFC8EA is organized as 512 bits by 8 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 12nmFFC stand...
355
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
...
356
50.0
High Bandwidth Out-of-Order RISC-V CPU IP Core
...
357
50.0
LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
358
46.0
32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 31 order, up to 32Gbps. Error count is accurate: no double counts or omissions reg...
359
46.0
32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7 or 15 order, up to 32Gbps. Error count is accurate: no double counts or omission...
360
46.0
32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
This unit generates and checks Pseudo Random Bit Sequence (PRBS) of 7, 15 or 31 order, up to 32Gbps. Error count is accurate: no double counts or omis...
361
40.0
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
362
40.0
LPDDR5X/5/4X/4 PHY for 16nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
363
40.0
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
364
30.0
4-/8-bit mixed-precision NPU IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
365
30.0
UCIe Die-to-Die Chiplet Controller
Introducing OPENEDGES’ Universal Chiplet Interconnect Express (UCIe) Controller IP, OUC, designed to transform the semiconductor landscape with innova...
366
30.0
UFS Host Controller 4.1 IP
The UFS Host Controller Interface (UFSHCI) is a high-performance interface that connects to UniPro and M-PHY IP in mobile platforms. It provides comma...
367
30.0
High speed NoC (Network On-Chip) Interconnect IP
OPENEDGES is the only total memory system IP company providing both memory controller and on-chip interconnect. OIC is the ORBIT high-speed On-chip In...
368
30.0
Highly scalable inference NPU IP for next-gen AI applications
OPENEDGES, the total memory subsystem IP provider, introduces ENLIGHT Pro, a state-of-the-art inference neural processing unit (NPU) IP that outperfor...
369
30.0
RISC-V Tensor Unit
The bulk of computations in Large Language Models (LLMs) is in fully-connected layers that can be efficiently implemented as matrix multiplication. Th...
370
30.0
All in one solution for AI in RISC-V
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371
29.0
USB V3.1 Power Delivery Type-C Port Evaluation board for OTI9108 IP
The OTS9106 board is a complete FPGA and ARM processor based USB PD Type-C port, featuring the RTL and C source code of the Obsidian Technology OTI910...
372
25.0
Superscalar Out-of-Order Execution Multicore Cluster
AndesCore™ AX65 64-bit multicore CPU IP is a high-performance quad decode 13-stage superscalar out-of-order processor based on AndeStar™ V5 architectu...
373
20.0
100Base-T1 Automotive Ethernet PHY
100Base-T1 Automotive Ethernet PHY...
374
20.0
PCIe 4.0 PHY in TSMC(6nm,7nm,12nm,16nm)
M31 PCIe 4.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 4.0 IP suppo...
375
20.0
PCIe 5.0 PHY IP for Storage and High-Bandwidth Connection
M31 PCIe 5.0 PHY IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. The PCIe 5.0 IP suppo...
376
20.0
GDDR6 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
377
20.0
High Performance HBM, HBM3 Memory Controller
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
378
20.0
MIPI C-PHY/D-PHY Combo(5nm, 7nm, 12/16nm, 28nm, 40nm, 55nm)
MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...
379
20.0
MIPI M-PHY v4.1/v3.1 IP in TSMC(5nm, 6nm, 7nm, 12nm,16nm, 22nm, 28nm, 40nm, and 55nm)
MIPI M-PHY is a serial interface technology with high bandwidth capabilities, which is particularly developed for mobile applications to obtain low pi...
380
20.0
LPDDR4/3, DDR4/3 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
381
20.0
LPDDR4x/4 PHY IP for 22nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
382
20.0
LPDDR5X/5/4X/4 combo PHY at 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integration in high-performan...
383
20.0
USB4 Gen3X2 and DP1.4 X4 PHY IP with Type-C connector support
M31 USB4 Gen3x2 transceiver IP provides a complete range of USB4 Gen3x2 host and peripheral applications up to 40Gbps. It is compliant with the PIPE5....
384
15.5556
SMD RISC-V SDK
Quickly and seamlessly develop, debug and fine-tune applications for Semidynamics RISC-V hardware with the SMD RISC-V SDK. It is a complete software d...
385
11.0
NVM Anti-Fuse OTP NeoFuse in DBHitek(90nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
386
11.0
NVM Anti-Fuse OTP NeoFuse in GLOBALFOUNDRIES (55nm, 40nm, 28nm, 22nm, 12nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
387
11.0
NVM Anti-Fuse OTP NeoFuse in HHNEC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
388
11.0
NVM Anti-Fuse OTP NeoFuse in HLIC (28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
389
11.0
NVM Anti-Fuse OTP NeoFuse in Huali (55nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
390
11.0
NVM Anti-Fuse OTP NeoFuse in Maxchip (90nm, 80nm, 55nm, 40nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
391
11.0
NVM Anti-Fuse OTP NeoFuse in NEXCHIP (90nm, 55nm, 40nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
392
11.0
NVM Anti-Fuse OTP NeoFuse in Samsung (130nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
393
11.0
NVM Anti-Fuse OTP NeoFuse in SKHYNIX (90nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
394
11.0
NVM Anti-Fuse OTP NeoFuse in SMIC (90nm, 55nm, 40nm, 28nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
395
11.0
NVM Anti-Fuse OTP NeoFuse in TSMC (130nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm, 16nm, 12nm, N7, N6, N5, N5A, N4P)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
396
11.0
NVM Anti-Fuse OTP NeoFuse in UMC (110nm, 80nm, 55nm, 40nm, 28nm, 22nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
397
11.0
NVM Anti-Fuse OTP NeoFuse in USJC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
398
11.0
NVM Anti-Fuse OTP NeoFuse in Vanguard (150nm, 110nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
399
11.0
NVM Anti-Fuse OTP NeoFuse in XMC (55nm)
NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-...
400
11.0
NVM EEPROM NeoEE in CSMC (180nm, 160nm)
eMemory's NeoEE IP is a cost-effective embedded EEPROM solution for both foundries & customers. No additional masks are required, and NeoEE gives foun...