Design & Reuse
1740 IP
1251
0.118
UMC 0.5um Logic process standard asynchronous low density low power single port SRAM memory compiler.
UMC 0.5um Logic process standard asynchronous low density low power single port SRAM memory compiler....
1252
0.118
UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler.
UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler....
1253
0.118
UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler.
UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler....
1254
0.118
UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler.
UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler....
1255
0.118
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler....
1256
0.118
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.
UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler....
1257
0.118
UMC 28nm HPC Logic process PG One Port Register File
UMC 28nm HPC Logic process PG One Port Register File...
1258
0.118
UMC 28nm HPC Logic process PG One Port Register File with LVT
UMC 28nm HPC Logic process PG One Port Register File with LVT...
1259
0.118
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler...
1260
0.118
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler...
1261
0.118
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler...
1262
0.118
UMC 28nm HPC Logic process PG-One Port Register File with HVT
UMC 28nm HPC Logic process PG-One Port Register File with HVT...
1263
0.118
UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler
UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler...
1264
0.118
UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler
UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler...
1265
0.118
UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral
UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral...
1266
0.118
UMC 28nm HPC Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format
UMC 28nm HPC Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format...
1267
0.118
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format
UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format...
1268
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
1269
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...
1270
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...
1271
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
1272
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
1273
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1274
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
1275
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
1276
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
1277
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
1278
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1279
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
1280
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
1281
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
1282
0.118
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
1283
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
1284
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...
1285
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...
1286
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...
1287
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...
1288
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...
1289
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...
1290
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...
1291
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...
1292
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...
1293
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...
1294
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...
1295
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...
1296
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...
1297
0.118
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)
UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...
1298
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 1.8V device RTC Core Library...
1299
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...
1300
0.118
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)...