Design & Reuse
1740 IP
1651
0.118
Standard Cell (Generic) Library IP, 9 tracks, UMC 0.35um Logic process
UMC 0.35um 3.3V Logic process Standard Cell Library....
1652
0.118
Standard Cell (Generic) Library IP, UMC 0.35um Logic process
UMC 0.35um Logic process standard Core Cell Library....
1653
0.118
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process
18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process....
1654
0.118
Audio ADDA IP, 18 bits, 96KHz, UMC 0.25um Logic process
18-Bit 96KHz Sigma-Delta audio Codec, UMC 0.25um Logic process....
1655
0.118
Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process
Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process...
1656
0.118
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process.
5V 1W Mono Speaker Amplifier, UMC 55nm SP/RVT LowK Logic Process....
1657
0.118
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process
5V with 250mA driving capability, Istb=120uA Linear Regulator; 0.35um Logic process...
1658
0.118
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process
8V ~ 25V HV driver, UMC 0.35um 3.3V/5V/40V CDMOS logic process...
1659
0.118
LVDS Rx IO IP, UMC 0.18um Logic process
LVDS RX IO, UMC 90nm SP/RVT Low-K Logic process....
1660
0.118
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process
LVDS RX IO PAD 300 Mbps with combo GPIO , UMC 55nm eflash/RVT LowK Logic Process...
1661
0.118
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process
LVDS RX IO PAD 500 Mbps ,UMC 40nm LP/RVT LowK Logic Process...
1662
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad.
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, Bump pad....
1663
0.118
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip
LVDS RX IO PAD 500 Mbps, UMC 40nm LP/RVT LowK Logic Process, for flip chip...
1664
0.118
LVDS Tx IO IP, UMC 0.35um Logic process
0.13um LVDS TX IO PAD, UMC 0.13um HS/HVT-FSG process....
1665
0.118
Two Port Register File Compiler IP, UMC 0.162um Logic process
UMC 0.162um Logic process synchronous Two Port Register File SRAM memory compiler....
1666
0.118
FXAFE030HH0L is an Analog Front End IP for image processing applications. FXAFE030HH0L is fabricated in UMC 40 nm logic LP/HVT Low-K process to implement a signal processing solution for scanners, video and imaging applications. _x005F_x005F_x005F_x000D_
FXAFE030HH0L is an Analog Front End IP for image processing applications. FXAFE030HH0L is fabricated in UMC 40 nm logic LP/HVT Low-K process to implem...
1667
0.0
H.264 Low Power & Low Latency Hardware Video Decoder IP Core
The Atria Logic AL-H264D-HW is a hardware-based, low power, low latency, feature-rich, H.264 (AVC) Baseline Profile video decoder IP core, targeted fo...
1668
0.0
H.264 UHD Hi422 Intra Video Decoder IP- very low latency
The AL-H264D-4KI422-HW is a hardware-based, feature rich, low latency, high video quality H.264 (AVC) UHD Hi422 Intra decoder IP core. The AL-H264D-4K...
1669
0.0
40G UDP IP Stack
Logic Fruit’s 40G UDP IP Stack implements a hardware protocol stack for UDP/IP, allowing fast communication over a point-to-point connection or LAN....
1670
0.0
10G UDP IP Stack
This 10G UDP IP Stack carries out the implementation of a hardware protocol stack for UDP/IP, allowing fast communication over a point-to-point connec...
1671
0.0
512x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00512X1MX180LA52NA is organized as a 512-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXIC 0.18μm...
1672
0.0
128x1 Bits OTP (One-Time Programmable) IP, UM- 0.153μm Logic and Mixed-Mode 1.8V/3.3V process
The ATO00128X1UM153LMM3NA is organized as a 128-bit by 1 one-time programmable (OTP). This is a kind of non-volatile memory fabricated in 0.153um CMO...
1673
0.0
32x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic 18A Process
The ATO00032X1MX180LOG2NA is organized as a 32-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm l...
1674
0.0
32x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00032X1MX180LB52NC is organized as a 32-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm l...
1675
0.0
32x1 Bits OTP (One-Time Programmable) IP, MXI- 0.18μm 1.8V/5V Logic Process
The ATO00032X1MX180LB52ND is organized as a 32-bit by 1 one-time programmable (OTP). This is a type of non-volatile memory fabricated in MXI- 0.18μm l...
1676
0.0
64x8 Bits OTP (One-Time Programmable) IP, Ca-Sem- 0.18μm 1.8V/3.3V Logic Process
The ATO00064X8CA180TGO3NA is organized as a 64-bit by 8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Ca-Sem- 0.18μ...
1677
0.0
64x8 Bits OTP (One-Time Programmable) IP, Ne-chi- 0.15μm 3.3V Logic Processes
The ATO00064X8NX150FPS3NA is organized as a 64x8 one-time programmable (OTP). This is a type of non-volatile memory fabricated in Ne-chi- 0.15μm 3.3V ...
1678
0.0
95 dB of SNR, Pure logic stereo audio DAC with patented PLL-less feature in TSMC 130G
loDAC-95-LO-pl_TSMC_130_G is a set of Virtual Components comprised of a fully digital core with Delta-sigma - PWM to provide a stereo digital-to-analo...
1679
0.0
CAN Controller
CAN Controller...
1680
0.0
HBM Verification IP
The Atria Logic High Bandwidth Memory (HBM) Verification IP is a System Verilog (SV) based IP that can be used to verify a HBM memory controller desig...
1681
0.0
PCIe GEN6 PHY
Designed for next-generation PCIe systems, the PCIe GEN6 PHY IP supports data rates up to 64GT/s per lane with advanced PAM4 signaling. It ensures eff...
1682
0.0
HDTV H.264/AVC Video Encoder with Compressed Frame Store
The OL_H264E-CFS core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video ...
1683
0.0
AES 256 encryption IP core
Logic Fruit’s AES 256 encryption IP core implements Rijndael encoding and decoding. It works with 256-bit blocks and is programmed to work with 256-bi...
1684
0.0
DES Cryptoprocessor
This core is a fully compliant implementation of the DES encryption algorithm. Both encryption and decryption are supported. ECB, CBC and triple DES v...
1685
0.0
JESD204B Transmitter and Receiver
Logic fruit Technologies has designed JESD204B RTL IP. It can support increased lane rates upto 12.5Gbps for higher bandwidth applications. It can be ...
1686
0.0
JESD204C Transmitter and Receiver
Logic fruit Technologies has designed JESD204C RTL IP to support increased lane rates upto 32Gbps for higher bandwidth applications. This IP can be co...
1687
0.0
1G UDP IP Stack
Logic Fruit’s 1G UDP IPⓇ is specialized in data transmission and reception over the internet. The UDP Protocol helps to establish a low-latency and lo...
1688
0.0
Phase-frequency detector in CMOS logic
The phase-frequency detector (PFD) consists of a signal level converter from differential reduced swing ECL to single-ended full swing CMOS signal and...
1689
0.0
Phase-frequency detector in ECL logic
The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplexer, which allow to sw...
1690
0.0
MIL1553B IP Core
MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...
1691
0.0
MIL1553B IP Core
MIL-STD-1553B defines specifications for terminal device operation and coupling, word structure and format, messaging protocol and electrical characte...
1692
0.0
LIN Master Slave Controller
Local Interconnect Network (LIN) is a broadcasting, Single Master, and Multi Slave (up to 16) communication protocol designed to support those feature...
1693
0.0
Discrete Cosine Transform OL_DCT
This core can perform the two dimensional Discrete Cosine Transform (DCT) and its inverse (IDCT) on an 8x8 block of samples. The simple, fully synchro...
1694
0.0
DisplayPort Transmitter & Receiver
Logic Fruit Technologies has designed & implemented DISPLAY PORT Transmitter & Receiver IP Cores supporting multiple line rates up to 8.1Gbps. The IP ...
1695
0.0
FlexRay Controller
Logic Fruit Technologies has designed FlexRay RTL IP Core, supporting data rate up to 10 Mbps. FlexRay, a high-speed protocol for advanced vehicles...
1696
0.0
OL_H264E-CFS HDTV H.264/AVC Video Encoder with Compressed Frame Store
The OL_H264E-CFS core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video ...
1697
0.0
On-Chip Logic Analyzer
The LOGAN - On-chip Logic Analyzer IP core can trace and display on-chip signals. When armed, the on-chip logic analyzers stores the traced signals in...
1698
0.0
DolphinWare Control Logic Ips
Dolphin Technology provides DolphinWare Control Logic IPs, consist of Arbiter and FIFO....
1699
0.0
DolphinWare Logic Components Ips
Dolphin Technology provides DolphinWare Logic Components IPs, consist of Counters, Registers and MUXs....
1700
0.0
Low latency H.264 UHD Hi422 Intra Video Encoder IP Core
The AL-H264E-4KI422-HW is a hardware-based, feature rich, low latency, high video quality H.264 (AVC) UHD Hi422 Intra encoder IP core. The AL-H264E-4K...