Logic Fruit Technologies IP Cores

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701

0.118

UMC 0.25um LOGIC process standard Multi-Voltage IO

UMC 0.25um LOGIC process standard Multi-Voltage IO...

702

0.118

UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler.

UMC 0.45um Logic process standard gate array asynchronous embedded array high density two port (1R1W) SRAM memory compiler....

703

0.118

UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler.

UMC 0.45um Logic process standard gate array asynchronous high density single port SRAM memory compiler....

704

0.118

UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler.

UMC 0.45um Logic process standard gate array asynchronous metal programmed ROM memory compiler....

705

0.118

UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells

UMC 0.5um LOGIC process Low Voltage Gate Array true 5.0V Oscillator IO cells...

706

0.118

UMC 0.5um Logic process standard asynchronous high density single port SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous high density single port SRAM memory compiler....

707

0.118

UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous high density two port (1R1W) SRAM memory compiler....

708

0.118

UMC 0.5um Logic process standard asynchronous low density low power single port SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous low density low power single port SRAM memory compiler....

709

0.118

UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler.

UMC 0.5um Logic process standard asynchronous low density low power two port (1R1W) SRAM memory compiler....

710

0.118

UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler.

UMC 0.5um Logic process standard asynchronous VIA2 programmed ROM memory compiler....

711

0.118

UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler.

UMC 0.5um Logic process standard synchronous diffusion programmed ROM memory compiler....

712

0.118

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler....

713

0.118

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler.

UMC 0.5um Logic process standard synchronous high density single port SRAM memory compiler....

714

0.118

UMC 28nm HPC Logic process PG One Port Register File

UMC 28nm HPC Logic process PG One Port Register File...

715

0.118

UMC 28nm HPC Logic process PG One Port Register File with LVT

UMC 28nm HPC Logic process PG One Port Register File with LVT...

716

0.118

UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler

UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler...

717

0.118

UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler

UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler...

718

0.118

UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler

UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler...

719

0.118

UMC 28nm HPC Logic process PG-One Port Register File with HVT

UMC 28nm HPC Logic process PG-One Port Register File with HVT...

720

0.118

UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler

UMC 28nm HPC Logic Process Ultra High Density 1-Port Register File Memory Compiler...

721

0.118

UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler

UMC 28nm HPC Logic Process Ultra High Density Single-Port SRAM Memory Compiler...

722

0.118

UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral

UMC 28nm HPC Logic Process Via ROM Low Power Compiler with HVT peripheral...

723

0.118

UMC 28nm HPC Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format

UMC 28nm HPC Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format...

724

0.118

UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format

UMC 28nm HPC+ Logic Process, LVDS RX Receives serial LVDS signal and de-serialize them into parallel format...

725

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...

726

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C35)...

727

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track generic_core cell library (C40)...

728

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...

729

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...

730

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

731

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

732

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

733

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

734

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

735

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

736

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C30)...

737

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C35)...

738

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track Generic Core cell library enhanced for routing (C40)...

739

0.118

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/HVT Logic and Mixed-Mode Process 9-track POWERSLASH cell library enhanced for routing (C35)...

740

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track eco_m1 cell library (C35)...

741

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track PowerSlash cell library (C35)...

742

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Cell library (C35)...

743

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C30)...

744

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 12-track Standard Generic core cell library (C40)...

745

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track ECO_M1 cell library enhanced for routing (C35)...

746

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C30)...

747

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C35)...

748

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track Generic Core cell library enhanced for routing (C40)...

749

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 7-track POWERSLASH cell library enhanced for routing (C35)...

750

0.118

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)

UMC 28nm HPC/LVT Logic and Mixed-Mode Process 9-track ECO_M1 cell library enhanced for routing (C35)...

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