Design & Reuse
Catalog of SIP Cores
System on Chip design resources
1577 IP
301
0.0
64G Multi-SerDes
INNOSILICON™ 64G Multi-SerDes PHY IP is a highly configurable PHY capable of supporting speeds up to 64 Gbps within a single lane. The PHY is pre-conf...
302
0.0
MACsec - Balanced - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
303
0.0
MACsec - High-speed - Security Protocol
MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards th...
304
0.0
RapidIO 2.0 PHY & Controller
The Innosilicon Serdes Combo PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interf...
305
0.0
SAR ADC
INNOSILICON™ SAR ADC IP is a small-size, low power analog to digital converter which leverages charge-redistribution successive approximation technolo...
306
0.0
SAR-ADC_1M10b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
307
0.0
SAR-ADC_1M12b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
308
0.0
SAR-ADC_1M12b_8ch
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
309
0.0
SAR-ADC_5M12b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
310
0.0
SAR-ADC_5M12b_8ch
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
311
0.0
Hardware NLM (Non-Local-Mean) Video Noise Reduction IP core
NLM (Non Local Mean) is a noise reduction algorithm wherein the value of each pixel is determined a rectangle of pixels around that pixel (a “center p...
312
0.0
SATA 3.0 PHY
The INNOSILICON mixed signal SATA3.0 transceiver PHY provides a complete SATA3.0 standard compliant transceiver physical interface solution for delive...
313
0.0
XAUI PHY
The Innosilicon XAUI PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 standard...
314
0.0
PCIe 3.0 Controller
The Innosilicon Gen1/2/3 PCI Express Controller provides a PCI Express Root Complex (RC) and Endpoint (EP) application. It’s a high performance, high ...
315
0.0
PCIe 3.0 PHY
The Innosilicon PCIe3.0 PHY is a highly configurable PHY capable of supporting speeds up to 8Gbps within a single lane. For this particular datasheet,...
316
0.0
PCIe 3.0/3.1/USB3.0/SATA3 Combo PHY
The Innosilicon PCIE3.0 PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the PHY Interface f...
317
0.0
UCIe Chiplet PHY & Controller in Global Foundries (12 nm, 14 nm)
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
318
0.0
UCIe Chiplet PHY & Controller in Samsung (8nm, 10nm, 14nm)
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
319
0.0
UCIe Chiplet PHY & Controller in SMIC (14 nm)
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
320
0.0
UCIe Chiplet PHY & Controller in TSMC (3nm, 4nm, 5nm, 7nm, 10nm, 12nm, 16nm)
INNOSILICON™ UCIe Chiplet IP offers a customizable solution for seamless, low-latency data transfer between silicon dies and chips, enabling heterogen...
321
0.0
PCIe2.0 PHY & Controller
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
322
0.0
PCIe2.1 PHY
The Innosilicon SERDES PHY is a highly configurable PHY capable of supporting speeds up to 25Gbps within a single lane. For this particular datasheet,...
323
0.0
PCIe4/3/2/1 PHY & Controller
The Innosilicon PCIe4.0 PHY is a highly configurable PHY capable of supporting speeds up to 16Gbps within a single lane. For this particular datasheet...
324
0.0
PCIe5.0/4.0/3.0 PHY & Controller
INNOSILICON™ PCIe 5.0 IP combines a high-performance controller and PHY, which is fully compliant with PCIe 5.0/4.0/3.0, and PIPE specifications. The ...
325
0.0
HDMI2.1/2.0/1.4 PHY & Controller
INNOSILICON™ HDMI IP is designed for transmitting and receiving video and audio signals between the video source devices and display. It is fully comp...
326
0.0
eDP1.4 Transmitter PHY
Innosilicon eDP TX IP is designed to transmit video, audio and auxiliary data from system host device to a display device for display applications. I...
327
0.0
DDR3/3L/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible S...
328
0.0
DDR3/3L/2/LPDDR3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR3/3L/2/LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
329
0.0
DDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRA...
330
0.0
DDR4/3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/2 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM de...
331
0.0
DDR4/3/3L/LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/3L/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
332
0.0
DDR4/3/LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...
333
0.0
DDR4/3/LPDDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
334
0.0
DDR4/3/LPDDR4X/4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/3/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
335
0.0
DDR4/LPDDR4/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatib...
336
0.0
DDR4/LPDDR4/4X/3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal DDR4/LPDDR4/4X/3 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
337
0.0
DDR4/LPDDR4X/4 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...
338
0.0
SecureOne anti-counterfeiting solution
BlueSemi's SecureOne™ is the anti-counterfeiting solution you need to protect your premier products from imitations. SecureOne™ is an ...
339
0.0
Temperature/Voltage Sensor IP
Innosilicon Temperature/Voltage Sensor IP is designed for on-chip temperature measurement. Besides temperature, it also can measure on-chip voltage, s...
340
0.0
Temperature/Voltage Sensor IP_12bit
Innosilicon Temperature Sensor IP is designed for on-chip temperature measurement. Besides temperature, it also can measure on-chip voltage, such as c...
341
0.0
Versatile AES
XIP1123B Versatile AES IP core ensures robust encryption and decryption, providing data confidentiality and integrity with the Advanced Encryption Sta...
342
0.0
AES - CTR
XIP1103H is a high-speed IP Core implementing the Advanced Encryption Standard (AES) in Counter Mode (CTR). The Counter mode of operation effectively ...
343
0.0
AES - GCM - Balanced variant
XIP1113B is a balanced IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptographi...
344
0.0
AES - GCM - High-speed variant
XIP1113H is a a high-speed IP core implementing the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM). AES-GCM is a widely used cryptogr...
345
0.0
AES - XTS - Balanced variant
XIP1183B is a balanced IP core implementing the Advanced Encryption Standard (AES) with 256-bit key in XTS mode. AES-XTS is block-oriented cipher for...
346
0.0
AES - XTS - High-speed variant
XIP1183H is a high-speed IP core implementing the Advanced Encryption Standard (AES) with 256-bit key in XTS mode. AES-XTS is block-oriented cipher f...
347
0.0
AES Engine IP
YEESTOR s AES engine (ESAES) IP is a high-performance cryptographic engine operates in AES (Rijndael) NIST Federal information processing standard FIP...
348
0.0
JESD204B Controller
JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...
349
0.0
JESD204B PHY & Controller
JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B...
350
0.0
SGMII PHY
The Innosilicon SGMII PHY is a highly programmable module that processes high-speed serial data to parallel data compatible with the IEEE802.3 1000BAS...