Design & Reuse
Catalog of SIP Cores
System on Chip design resources
796 IP
401
0.0
LPDDR2 PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2 PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible SDRAM devi...
402
0.0
LPDDR3/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compatible SD...
403
0.0
LPDDR3/2/DDR3/3L Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR2/3/DDR3/3L COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compa...
404
0.0
LPDDR3/2/DDR3/3L/2 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR3/2/DDR3/3L/2 COMBO PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC com...
405
0.0
LPDDR4X, LPDDR4, DDR4, LPDDR3 Combo PHY & Controller
The INNOSILICON DDR IPTM Mixed-Signal LPDDR4/4X/DDR4/LPDDR3 PHYs provide turnkey physical interface solutions for ICs requiring access to JEDEC compat...
406
0.0
LPDDR4X/4/3/DDR4/3/3L PHY + Controller
INNOSILICON™ LPDDR4X/4/3/DDR4/3/3L Combo IP is a customizable Mixed-Signal DDR memory interface suite. The Combo IP provides turnkey physical interfac...
407
0.0
nQrux - Hardware Trust Engines
Xiphera's nQrux™ family of Hardware Trust Engines offers ready-to-implement security modules for various security architectures. The nQrux&t...
408
0.0
MRDIMM DDR5 & DDR5/4 PHY & Controller
INNOSILICON™ DDR5 IP includes the MRDIMM DDR5 PHY and DDR5/4 Combo PHY and corresponding controllers for ICs requiring access to JEDEC compatible SDRA...
409
0.0
Process/Voltage/ Temperature Sensor
INNOSILICON™ PVT Sensor IP is designed for on-chip monitoring of processes, voltage, and temperature variations. It is a critical component in modern ...
410
0.0
RSA Signature Verification
The RSA Signature Verification from Xiphera is a very compact Intellectual Property (IP) core designed for RSA (Rivest-Shamir-Adleman) signature verif...
411
0.0
Ascon
Xiphera's Ascon symmetric encryption IP cores provide robust security for a wide range of applications. It is, as a lightweight encryption algorithm, ...
412
0.0
HSIC PHY
The Innosilicon HSIC PHY is fully compliant with the High-Speed Inter-Chip Supplement to the USB 2.0 Specification. By stripping off all the legacy US...
413
0.0
PSRAM PHY
The INNOSILICON DDR IPTM Mixed-Signal PSRAM PHY provides turnkey physical interface solutions for ICs requiring access to JEDEC compatible PSRAM devic...
414
0.0
PSRAM/RPC PHY & Controller
INNOSILICON™ PSRAM IP consists of a configurable PHY and RPC PHY and a controller. It provides the physical interface solutions for ICs requiring acce...
415
0.0
Standalone IPsec
IPsec (Internet Protocol Security) is a widely implemented protocol to secure communications across the Internet. Xiphera’s IPsec IP core enhances sec...
416
0.0
Successive Approximation ADC_2M10b
Innosilicon SARADC IP is a small-sized, low power analog to digital converter with input channels. The converter is a charge-redistribution successive...
417
0.0
Successive Approximation ADC_2M12b
Innosilicon SAR-ADC IP is a small-size, low power analog to digital converter. The converter is a charge-redistribution successive approximation ADC. ...
418
0.0
Successive Approximation ADC_3M10b
Innosilicon SARADC IP is a small-sized, low power analog to digital converter with input channel and Standard I/O multiplexed. The converter is a char...
419
0.0
Audio Codec
INNOSILICON™ Audio Codec IP is a low power, high resolution, stereo audio solution which leverages Sigma-Delta noise-shaping technology. The ADC, DAC,...
420
0.0
PUF Security
A physical unclonable function, or PUF, is a "digital fingerprint" that serves as a unique identity for a semiconductor device such as a microprocesso...
421
0.0
Multi-Channel HDTV H.264/AVC Limited Baseline Video Decoder
The OL_H264MCLD core is a hardware implementation of the H.264 baseline video compression algorithm. The core decodes a bitstream produced by the OLH2...
422
0.0
Multi-Video-Source Multiplexing Serial Video Transmitter for MIPI CSI2
The SVT-CS4AP2 supports MIPI CSI2 over MIPI D-PHY. It allows mutilplexing of up to 10 video sources into a CSI2 output stream...
423
0.0
Multiplexing transceiver with 4 CSI2 inputs and a single CSI2 output
This IP multiplexes inputs from up to 4 CSI2 cameras, each with up to 4 data lanes, to a single CSI2 output stream, with up to 4 lanes. It comprises o...
424
0.0
Curve25519 Key Exchange
The Curve25519 Key Exchange from Xiphera is a very compact Intellectual Property (IP) core designed for efficient key exchange using the X25519 protoc...
425
0.0
Curve25519 Key Exchange & Digital Signatures
The Curve25519 Key Exchange & Digital Signatures from Xiphera is a very compact Intellectual Property (IP) core designed for efficient X25519 key exch...
426
0.0
eUSB2 PHY
The industry’s most advanced process nodes do not support 3.3V signaling and 5V tolerance as required by the USB 2.0 specification. 3.3V signaling was...
427
0.0
LVDS RX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
428
0.0
LVDS TX Combo TTL PHY
Innosilicon LVDS implements LVDS TIA/EIA protocol. Normally, Innosilicon LVDS contains four 7-bit parallel-load serial-out shift registers, a 7X clock...
429
0.0
LVDS TX PHY & Controller
Innosilicon LVDS implements LVDS TIA/EIA protocol. It specifies a low-voltage point-to-point signal interface, which uses a differential driver connec...
430
0.0
LVDS/TTL PHY & Controller
INNOSILICON™ LVDS/TTL IP implements the LVDS TIA/EIA protocol, providing a low-voltage, high-speed point-to-point signal interface. It supports either...
431
0.0
Extended MIPI CSI2 Serial Video Receiver, 64 bits, 8 data lanes, 4 pixels/clock
Latest and forthcoming CMOS image sensors surpass 10M pixels, and output video at 30 and even 60 fps. This development requires high bandwidth betwe...
432
0.0
Type-C PHY
Innosilicon Type-C IP is composed of the physical layer and the PHY logic. The physical layer contains 4 data channels, an AUX channel and bias circui...
433
200.0
Electronic Design Automation Engineering
Discover the next generation of electronic design automation software Model, Simulate, and Optimize with EDA Software Shorten design cycles to a...
434
140.0
InfiniNoC Interconnect
InfiniNoC is a scalable, modular Network-on-Chip (NoC) IP for many-core and chiplet-based system-on-chip (SoC) designs requiring high bandwidth, low l...
435
125.0
SOS Core - Design Data and IP Management
Design data management platform for small to mid-sized teams, supporting analog, mixed-signal, digital, RF, and microwave designs with reliable versio...
436
125.0
SOS Enterprise - Design Data and IP Management
Secure design data management platform for global teams, supporting analog, mixed-signal, digital, RF, and microwave designs with unified data, full l...
437
100.0
7-bit, 64 GSPS ADC Ultra Low Power
The ODT-ADS-7B64G-3 is an ultra-high-bandwidth time-interleaved ADC designed in a 3nm CMOS process. This 7-bit, 64GSPS ADC supports ac-coupled inpu...
438
82.0
H.264 High Profiles Encoder - High 10, High 4:2:2 and High 4:4:4 (12 bit 4:2:2 or 4:2:0) Profiles
The H264-HP-E core from Alma Technologies is an advanced ITU-T H.264 High profiles hardware encoder. It supports real time encoding of 4:2:0 and 4:2:2...
439
70.0
Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
PQSecure™-CRYSTALS from PQSecure Technologies, LLC. is a set of hardware IP cores designed for various target applications of digital signatures and k...
440
50.0
12-bit, 9 GSPS High Performance Swift™ DAC in 16nm CMOS
The ODT-DAC-12B9G-16 is a high performance current steering 12-bit 9GSPS DAC on 16nm CMOS process that operates at an update rate of up to 9GSPS. The ...
441
50.0
Visual Design Diff
Schematic and layout comparison tool for analog, mixed-signal, and RF designs in Cadence Virtuoso....
442
50.0
Ultra-Low Latency 32Gbps SerDes Phy IP in 22 nm
As real-time workloads—from high-frequency trading to low-latency AI and edge analytics—push system responsiveness to the limit, every nanosecond coun...
443
40.0
Scalable UHD JPEG Encoder − Ultra-High Throughput, 8/10/12-bit per component and CBR video encoding
The UHT-JPEG-E core from Alma Technologies is a very high performance 8-bit Baseline and 12-bit Extended JPEG encoder, designed to enable the massive ...
444
35.0
JPEG 2000 Encoder - Up to 16-bit per Component Lossy & Numerically Lossless Image & Video Compression
The JPEG2K-E core from Alma Technologies is a still image and video encoder that implements Part 1 of the JPEG 2000 standard. It offers up to 16-bit ...
445
34.0
Image Signal Processing (ISP) for Automotive Vision (RPP X418)
Dream Chip’s Real-time Pixel Processor for Vision applications is a scalable and configurable High Dynamic Range (HDR) capable image signal processor ...
446
32.0
Image Signal Processing (ISP) for Automotive ADAS (RPP X328)
Dream Chip’s Real-time Pixel Processor for Vision applications is a scalable and configurable High Dynamic Range (HDR) capable image signal processor ...
447
30.0
12-bit, 9 GSPS High Performance Swift™ ADC in 16nm CMOS
The ODT-ADS-12B9G-16 is an ultra high-performance time-interleaved 12-bit 9GSPS ADC on 16nm CMOS process. This Swift™ ADC supports input bandwidth sig...
448
30.0
zstd compression and decompression IP core
The zstd (Zstandard) compression algorithm is an advanced, lossless data compression technology. It has quickly become a popular choice for a variety ...
449
30.0
LZ4 compression and decompression IP core
The LZ4 compression algorithm is a fast, lossless data compression technology renowned for its high-speed performance and low latency. LZ4 offers impr...
450
25.0
PCIE Gen5 digital controller
Primeexpress PCIE Gen5 digital controller from Primesoc, is well architect,high performance, modular designed and tailor made to plug and play in SOCs...