Mirabilis Design Inc. IP Cores

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2301

1.0

TSMC CL013LV 130nm Deskew PLL - 80MHz-400MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2302

1.0

TSMC CL013LV 130nm General Purpose PLL - 160MHz-800MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2303

1.0

TSMC CL013LV 130nm Spread Spectrum PLL - 160MHz-800MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2304

1.0

TSMC CL013LV 130nm Spread Spectrum PLL - 320MHz-1600MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2305

1.0

TSMC CL013LV 130nm Spread Spectrum PLL - 80MHz-400MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2306

1.0

TSMC CL013LVOD 130nm Clock Generator PLL - 110MHz-550MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2307

1.0

TSMC CL013LVOD 130nm Clock Generator PLL - 220MHz-1100MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2308

1.0

TSMC CL013LVOD 130nm Clock Generator PLL - 440MHz-2200MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2309

1.0

TSMC CL013LVOD 130nm DDR DLL - 116MHz-580MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2310

1.0

TSMC CL013LVOD 130nm DDR DLL - 183MHz-915MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2311

1.0

TSMC CL013LVOD 130nm DDR DLL - 87MHz-435MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2312

1.0

TSMC CL013LVOD 130nm Deskew PLL - 110MHz-550MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2313

1.0

TSMC CL013LVOD 130nm Deskew PLL - 220MHz-1100MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2314

1.0

TSMC CL013LVOD 130nm Deskew PLL - 440MHz-2200MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2315

1.0

TSMC CL013LVOD 130nm General Purpose PLL - 220MHz-1100MHz

The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2316

1.0

TSMC CL013LVOD 130nm Spread Spectrum PLL - 110MHz-550MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2317

1.0

TSMC CL013LVOD 130nm Spread Spectrum PLL - 220MHz-1100MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2318

1.0

TSMC CL013LVOD 130nm Spread Spectrum PLL - 440MHz-2200MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2319

1.0

TSMC CL015G 150nm Clock Generator PLL - 130MHz-650MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2320

1.0

TSMC CL015G 150nm Clock Generator PLL - 260MHz-1300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2321

1.0

TSMC CL015G 150nm Clock Generator PLL - 65MHz-325MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2322

1.0

TSMC CL015G 150nm DDR DLL - 120MHz-600MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2323

1.0

TSMC CL015G 150nm DDR DLL - 57MHz-285MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2324

1.0

TSMC CL015G 150nm DDR DLL - 76MHz-380MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2325

1.0

TSMC CL015G 150nm Deskew PLL - 130MHz-650MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2326

1.0

TSMC CL015G 150nm Deskew PLL - 260MHz-1300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2327

1.0

TSMC CL015G 150nm Deskew PLL - 65MHz-325MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2328

1.0

TSMC CL015G 150nm Spread Spectrum PLL - 130MHz-650MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2329

1.0

TSMC CL015G 150nm Spread Spectrum PLL - 260MHz-1300MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2330

1.0

TSMC CL015G 150nm Spread Spectrum PLL - 65MHz-325MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2331

1.0

TSMC CL015LV 150nm Clock Generator PLL - 140MHz-700MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2332

1.0

TSMC CL015LV 150nm Clock Generator PLL - 280MHz-1400MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2333

1.0

TSMC CL015LV 150nm Clock Generator PLL - 70MHz-350MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2334

1.0

TSMC CL015LV 150nm DDR DLL - 120MHz-600MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2335

1.0

TSMC CL015LV 150nm DDR DLL - 57MHz-285MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2336

1.0

TSMC CL015LV 150nm DDR DLL - 76MHz-380MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2337

1.0

TSMC CL015LV 150nm Deskew PLL - 140MHz-700MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2338

1.0

TSMC CL015LV 150nm Deskew PLL - 280MHz-1400MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2339

1.0

TSMC CL015LV 150nm Deskew PLL - 70MHz-350MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2340

1.0

TSMC CL015LV 150nm Spread Spectrum PLL - 140MHz-700MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2341

1.0

TSMC CL015LV 150nm Spread Spectrum PLL - 280MHz-1400MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2342

1.0

TSMC CL015LV 150nm Spread Spectrum PLL - 70MHz-350MHz

The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2343

1.0

TSMC CL018E 180nm Clock Generator PLL - 130MHz-650MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2344

1.0

TSMC CL018E 180nm Clock Generator PLL - 260MHz-1300MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2345

1.0

TSMC CL018E 180nm Clock Generator PLL - 65MHz-325MHz

The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2346

1.0

TSMC CL018E 180nm DDR DLL - 120MHz-600MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2347

1.0

TSMC CL018E 180nm DDR DLL - 57MHz-285MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2348

1.0

TSMC CL018E 180nm DDR DLL - 76MHz-380MHz

The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2349

1.0

TSMC CL018E 180nm Deskew PLL - 130MHz-650MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2350

1.0

TSMC CL018E 180nm Deskew PLL - 260MHz-1300MHz

The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

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