1801 1.0

TSMC CL018G 180nm Clock Generator PLL - 55MHz-275MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1802 1.0

TSMC CL018G 180nm DDR DLL - 42MHz-210MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1803 1.0

TSMC CL018G 180nm DDR DLL - 56MHz-280MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1804 1.0

TSMC CL018G 180nm DDR DLL - 88MHz-440MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1805 1.0

TSMC CL018G 180nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1806 1.0

TSMC CL018G 180nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1807 1.0

TSMC CL018G 180nm Deskew PLL - 55MHz-275MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1808 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 110MHz-550MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1809 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 220MHz-1100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1810 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 55MHz-275MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1811 1.0

TSMC CL018LP 180nm Clock Generator PLL - 180MHz-900MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1812 1.0

TSMC CL018LP 180nm Clock Generator PLL - 45MHz-225MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1813 1.0

TSMC CL018LP 180nm Clock Generator PLL - 90MHz-450MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1814 1.0

TSMC CL018LP 180nm DDR DLL - 30MHz-150MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1815 1.0

TSMC CL018LP 180nm DDR DLL - 40MHz-200MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1816 1.0

TSMC CL018LP 180nm DDR DLL - 63MHz-315MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1817 1.0

TSMC CL018LP 180nm Deskew PLL - 180MHz-900MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1818 1.0

TSMC CL018LP 180nm Deskew PLL - 45MHz-225MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1819 1.0

TSMC CL018LP 180nm Deskew PLL - 90MHz-450MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1820 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 180MHz-900MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1821 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 45MHz-225MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1822 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1823 1.0

TSMC CL018LV 180nm Clock Generator PLL - 118MHz-590MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1824 1.0

TSMC CL018LV 180nm Clock Generator PLL - 236MHz-1180MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1825 1.0

TSMC CL018LV 180nm Clock Generator PLL - 59MHz-295MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1826 1.0

TSMC CL018LV 180nm DDR DLL - 101MHz-505MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1827 1.0

TSMC CL018LV 180nm DDR DLL - 48MHz-240MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1828 1.0

TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1829 1.0

TSMC CL018LV 180nm Deskew PLL - 118MHz-590MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1830 1.0

TSMC CL018LV 180nm Deskew PLL - 236MHz-1180MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1831 1.0

TSMC CL018LV 180nm Deskew PLL - 59MHz-295MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1832 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 118MHz-590MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1833 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 236MHz-1180MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1834 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 59MHz-295MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1835 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 175MHz-875MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1836 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 350MHz-1750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1837 1.0

TSMC CLN28HP 28nm Clock Generator PLL - 700MHz-3500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1838 1.0

TSMC CLN28HP 28nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1839 1.0

TSMC CLN28HP 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1840 1.0

TSMC CLN28HP 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1841 1.0

TSMC CLN28HP 28nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1842 1.0

TSMC CLN28HP 28nm Deskew PLL - 350MHz-1750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1843 1.0

TSMC CLN28HP 28nm Deskew PLL - 700MHz-3500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1844 1.0

TSMC CLN28HP 28nm General Purpose PLL - 350MHz-1750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1845 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1846 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1847 1.0

TSMC CLN28HP 28nm Spread Spectrum PLL - 600MHz-3000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1848 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 110MHz-550MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1849 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1850 1.0

TSMC CLN28HPL 28nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...