1851 1.0

TSMC CLN28HPL 28nm DDR DLL - 117MHz-585MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1852 1.0

TSMC CLN28HPL 28nm DDR DLL - 156MHz-780MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1853 1.0

TSMC CLN28HPL 28nm DDR DLL - 246MHz-1230MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1854 1.0

TSMC CLN28HPL 28nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1855 1.0

TSMC CLN28HPL 28nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1856 1.0

TSMC CLN28HPL 28nm Deskew PLL - 440MHz-2200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1857 1.0

TSMC CLN28HPL 28nm General Purpose PLL - 220MHz-1100MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1858 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 110MHz-550MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1859 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 220MHz-1100MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1860 1.0

TSMC CLN28HPL 28nm Multi Phase DLL - 440MHz-2200MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1861 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 192MHz-962MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1862 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 384MHz-1920MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1863 1.0

TSMC CLN28HPL 28nm Spread Spectrum PLL - 96MHz-481MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1864 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 175MHz-875MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1865 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 350MHz-1750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1866 1.0

TSMC CLN28HPM 28nm Clock Generator PLL - 700MHz-3500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1867 1.0

TSMC CLN28HPM 28nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1868 1.0

TSMC CLN28HPM 28nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1869 1.0

TSMC CLN28HPM 28nm DDR DLL - 316MHz-1580MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1870 1.0

TSMC CLN28HPM 28nm Deskew PLL - 175MHz-875MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1871 1.0

TSMC CLN28HPM 28nm Deskew PLL - 350MHz-1750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1872 1.0

TSMC CLN28HPM 28nm Deskew PLL - 700MHz-3500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1873 1.0

TSMC CLN28HPM 28nm General Purpose PLL - 350MHz-1750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1874 1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 175MHz-875MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1875 1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 350MHz-1750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1876 1.0

TSMC CLN28HPM 28nm Multi Phase DLL - 700MHz-3500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1877 1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1878 1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1879 1.0

TSMC CLN28HPM 28nm Spread Spectrum PLL - 600MHz-3000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1880 1.0

TSMC CLN28LP 28nm Clock Generator PLL - 160MHz-800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1881 1.0

TSMC CLN28LP 28nm Clock Generator PLL - 320MHz-1600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1882 1.0

TSMC CLN28LP 28nm Clock Generator PLL - 80MHz-400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1883 1.0

TSMC CLN28LP 28nm DDR DLL - 120MHz-600MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1884 1.0

TSMC CLN28LP 28nm DDR DLL - 189MHz-945MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1885 1.0

TSMC CLN28LP 28nm DDR DLL - 90MHz-450MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1886 1.0

TSMC CLN28LP 28nm Deskew PLL - 160MHz-800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1887 1.0

TSMC CLN28LP 28nm Deskew PLL - 320MHz-1600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1888 1.0

TSMC CLN28LP 28nm Deskew PLL - 80MHz-400MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1889 1.0

TSMC CLN28LP 28nm General Purpose PLL - 160MHz-800MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1890 1.0

TSMC CLN28LP 28nm Multi Phase DLL - 160MHz-800MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1891 1.0

TSMC CLN28LP 28nm Multi Phase DLL - 320MHz-1600MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1892 1.0

TSMC CLN28LP 28nm Multi Phase DLL - 80MHz-400MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

1893 1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 140MHz-700MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1894 1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 280MHz-1400MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1895 1.0

TSMC CLN28LP 28nm Spread Spectrum PLL - 70MHz-350MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1896 1.0

TSMC CLN40G 40nm Clock Generator PLL - 170MHz-850MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1897 1.0

TSMC CLN40G 40nm Clock Generator PLL - 340MHz-1700MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1898 1.0

TSMC CLN40G 40nm Clock Generator PLL - 680MHz-3400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1899 1.0

TSMC CLN40G 40nm DDR DLL - 150MHz-750MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1900 1.0

TSMC CLN40G 40nm DDR DLL - 200MHz-1000MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...