5051 0.0

TSMC CLN5PLVT 5nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5052 0.0

TSMC CLN5PLVT 5nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5053 0.0

TSMC CLN5PLVT 5nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5054 0.0

TSMC CLN5PLVT 5nm DDR4 PHY - 4266Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5055 0.0

TSMC CLN5PLVT 5nm DDR5 PHY - 6400Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5056 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5057 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5058 0.0

TSMC CLN5PLVT 5nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5059 0.0

TSMC CLN5PLVT 5nm General Purpose PLL - 600MHz-3000MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

5060 0.0

TSMC CLN5PLVT 5nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

5061 0.0

TSMC CLN5PLVT 5nm LPDDR4 PHY - 4266Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

5062 0.0

TSMC CLN5PLVT 5nm LPDDR5 PHY - 6400Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

5063 0.0

TSMC CLN5PLVT 5nm Multi Phase DLL - 1200MHz-6000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5064 0.0

TSMC CLN5PLVT 5nm Multi Phase DLL - 300MHz-1500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5065 0.0

TSMC CLN5PLVT 5nm Multi Phase DLL - 600MHz-3000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5066 0.0

TSMC CLN5PLVT 5nm Spread Spectrum PLL - 1050MHz-5250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5067 0.0

TSMC CLN5PLVT 5nm Spread Spectrum PLL - 262MHz-1310MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5068 0.0

TSMC CLN5PLVT 5nm Spread Spectrum PLL - 524MHz-2620MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5069 0.0

TSMC CLN5PLVT 5nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

5070 0.0

TSMC CLN65GP 65nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

5071 0.0

TSMC CLN65LP 65nm IoT PLL - 30MHz-300MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

5072 0.0

TSMC CLN65LP 65nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

5073 0.0

TSMC CLN65ULP 65nm Clock Generator PLL - 100MHz-500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5074 0.0

TSMC CLN65ULP 65nm Clock Generator PLL - 200MHz-1000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5075 0.0

TSMC CLN65ULP 65nm Clock Generator PLL - 50MHz-250MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5076 0.0

TSMC CLN65ULP 65nm DDR DLL - 126MHz-630MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5077 0.0

TSMC CLN65ULP 65nm DDR DLL - 60MHz-300MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5078 0.0

TSMC CLN65ULP 65nm DDR DLL - 80MHz-400MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5079 0.0

TSMC CLN65ULP 65nm Deskew PLL - 100MHz-500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5080 0.0

TSMC CLN65ULP 65nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5081 0.0

TSMC CLN65ULP 65nm Deskew PLL - 50MHz-250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5082 0.0

TSMC CLN65ULP 65nm General Purpose PLL - 100MHz-500MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

5083 0.0

TSMC CLN65ULP 65nm IoT PLL - 30MHz-500MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

5084 0.0

TSMC CLN65ULP 65nm Multi Phase DLL - 100MHz-500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5085 0.0

TSMC CLN65ULP 65nm Multi Phase DLL - 200MHz-1000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5086 0.0

TSMC CLN65ULP 65nm Multi Phase DLL - 50MHz-250MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

5087 0.0

TSMC CLN65ULP 65nm Spread Spectrum PLL - 100MHz-500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5088 0.0

TSMC CLN65ULP 65nm Spread Spectrum PLL - 200MHz-1000MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5089 0.0

TSMC CLN65ULP 65nm Spread Spectrum PLL - 50MHz-250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5090 0.0

TSMC CLN65ULP 65nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

5091 0.0

TSMC CLN6FF 6nm Clock Generator PLL - 200MHz-1000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5092 0.0

TSMC CLN6FF 6nm Clock Generator PLL - 400MHz-2000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5093 0.0

TSMC CLN6FF 6nm Clock Generator PLL - 800MHz-4000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5094 0.0

TSMC CLN6FF 6nm DDR DLL - 188MHz-940MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5095 0.0

TSMC CLN6FF 6nm DDR DLL - 250MHz-1250MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5096 0.0

TSMC CLN6FF 6nm DDR DLL - 395MHz-1975MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5097 0.0

TSMC CLN6FF 6nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5098 0.0

TSMC CLN6FF 6nm DDR4 PHY - 4266Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5099 0.0

TSMC CLN6FF 6nm DDR5 PHY - 6400Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

5100 0.0

TSMC CLN6FF 6nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...