Design & Reuse
5348 IP
101
100.0
USB 2.0 PHY TSMC 5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm, 65nm, 130nm, 180nm
The Arasan USB 2.0 PHY IP core is a transceiver compliant with the USB 2.0 Transceiver Macrocell Interface Plus (UTMI+) level 3 specification, for use...
102
100.0
USB4 Controller & Router IP
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
103
100.0
USB4 PHY in Samsung (SF4X)
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
104
100.0
USB4 PHY in TSMC (N7, N6, N5, N4P, N3E, N3P)
The Synopsys USB4 IP solution is based on the USB4 specification from the USB Implementer Forum (USB-IF). The USB4 IP offering includes device router,...
105
100.0
TSMC CLN4P 4nm DDR5 PHY - 6400Mbps
The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...
106
100.0
TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
107
100.0
TSMC CLN7FF 7nm DDR DLL - 250MHz-1250MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
108
100.0
TSMC CLN7FF 7nm Spread Spectrum PLL - 700MHz-3500MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
109
100.0
TSMC CLN7FF 7nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
110
100.0
TSMC CLN7FFLVT 7nm DDR DLL - 360MHz-1800MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
111
100.0
TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
112
100.0
TSMC CLN7FFLVT 7nm Multi Phase DLL - 1200MHz-6000MHz
The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....
113
100.0
xSPI - PSRAM Master
Arasan Chip System’s xSPI/PSRAM master IP is easy to use, simple to work with, quick to operate, and reliable under all conditions. It supports the x...
114
100.0
RT-120 Compact Root of Trust for IoT and IIoT, sensors and gateways
Rambus Hardware Root of Trust RT-120 is a state-machine-based hardware security core offering security by design. It protects against a wide range of ...
115
100.0
Multiport/Multiprotocol HDCP 2.3 Embedded Security Modules
The Synopsys Embedded Security Modules (ESMs) for High- Bandwidth Digital Content Protection 2.3 (HDCP 2.3) are complete solutions that provide design...
116
100.0
CXL 2.0 Integrity and Data Encryption Security Module
The Compute Express Link (CXL) interface protocol enables low-latency data communication between system-on-chip (SoC) and general-purpose accelerators...
117
100.0
Synopsys 100G/200G/400G/800G Ethernet MAC IP
The Synopsys 100G/200G/400G/800G Ethernet MAC IP implements the full MAC layer and reconciliation sublayer compliant with the IEEE 802.3 specification...
118
100.0
Synopsys ARC-V RHX Series Functional Safety Processor
The Synopsys ARC-V™ RHX-110-FS, RHX-115-FS, RHX-110V-FS, and RHX-115V-FS functional safety processors simplify development of high-performance safety-...
119
99.0
TSMC CLN20SOC 20nm Clock Generator PLL - 700MHz-3500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
120
99.0
TSMC CLN20SOC 20nm Deskew PLL - 700MHz-3500MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
121
95.0
MACsec Engine 100-400Gbps Multi-Channel
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the EIP-164 is a high-performance MACsec frame processing engi...
122
95.0
MACsec Engine 800G Multi-Channel
As part of Rambus' award-winning silicon Intellectual Property (IP) product portfolio, the MACsec-164 is a high-performance MACsec frame processing e...
123
90.0
Ceva-Waves Bluetooth 5.4 Low Energy Baseband Controller / Link Layer, software and profiles
Ceva-Waves Bluetooth 5.4 Low Energy IP is a comprehensive and flexible solution for integration into SoCs/ASSPs. The Ceva-Waves BLE hardware baseb...
124
90.0
GF L28SLP 28nm IoT PLL - 30MHz-550MHz
The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...
125
90.0
TSMC CLN16FF+LL 16nm Ultra PLL - 15MHz-3000MHz
The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...
126
90.0
TSMC CLN20SOC 20nm Spread Spectrum PLL - 306MHz-1530MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
127
80.0
WAVE6331, AV1, H.265, HEVC, H.264, AVC, VP9 video codec IP for 4K and 8K New!
WAVE6331 is a 4K/8K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 8K30fps/4K120...
128
80.0
OCTA SPI PSRAM Controller
THis controller supports Xccela open standard bus for digital interconnect and data communications suitable for Volatile and nonvolatile memories such...
129
80.0
LDPC Encoder/Decoder (LDPC)
Mobiveil’s LDPC Encoder / Decoder* is a flash reliability solution delivering industry-leading flash endurance and retention through advanced LDPC err...
130
80.0
CFrame60, lossy, lossless FBC compression, decompression IP
The Chips&Media’s CFrame60 is a Lossless & Lossy Frame Compression Hardware IP, designed to significantly reduce memory size, DRAM bandwidth and power...
131
80.0
High Performance Scalable Sensor Hub DSP Architecture
SensPro2™ is the highly-scalable and enhanced 2nd generation high performance sensor hub DSP for multitasking sensing and AI of multiple sensors inclu...
132
80.0
ONFI Flash Controller
Mobiveil’s Enterprise Flash Controller (EFC) is a highly flexible and configurable design targeted for enterprise storage applications like SSD. The E...
133
80.0
Universal NVM Express Controller (UNEX)
Mobiveil's Universal NVM Express Controller (UNEX) is highly flexible and configurable design targeted for both Enterprise and client class solutions ...
134
80.0
xSPI NOR Flash controller
xSPI-NFC is JEDEC xSPI compliant NOR Flash controller IP supporting devices from various vendors with XIP and Auto-boot support. The IP also has Conti...
135
75.0
6-12-bit, Gen Analog-to-Digital Converter (ADC) IP block
Alphacore offers proven 6-12-bit analog to digital converters (ADC) intellectually property (IP) design blocks with the industry's best low-power and ...
136
75.0
4-16-bit, Gen Digital-to-Analog Converter (DAC) IP block
Alphacore offers proven 4-16-bit digital-to-analog converters (DAC) intellectually property (IP) design blocks with the industry's best low-power and ...
137
75.0
MIPI CSI DSI Controller - CPHY CSI-2 Transmitter v 2.1, Compatible with MIPI C-PHY v1.2 & DPHY v2.1.
The Arasan MIPI CSI-2 Transmitter IP Core functions as a MIPI Camera Serial Interface between a peripheral device (display module) and a host processo...
138
75.0
ONFI 4.1 NAND Flash Controller & PHY & IO Pads on 16nm
The NAND Flash landscape is changing and the Arasan NAND Flash Controller IP Core is changing in accordance with it. New applications are emerging and...
139
75.0
ONFI 4.2 PHY
Open NAND Flash Interface (ONFI) for NAND Flash Memory chips is an open standard. Arasan’s ONFI 4.2 PHY IP is designed to connect seamlessly with thei...
140
70.0
40G UCIe PHY IP on Samsung SF4X
Synopsys UCIe PHY IP enables high-bandwidth, low-power, and low-latency die-to-die connectivity in a multi-die package for hyperscale data center, AI,...
141
70.0
WAVE6010, H.265, HEVC, H.264, AVC, video decoder IP for 4K and 8K New!
WAVE6010 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@500MHz r...
142
70.0
WAVE6031, AV1, H.265, HEVC, H.264, AVC, VP9 video decoder IP for 4K and 8K New!
WAVE6031 is a 4K/8K multi-standard video decoder HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 8K30fps/4K1...
143
70.0
WAVE6100, H.265, HEVC, H.264, AVC, video encoder IP for 4K and 8K New!
WAVE6100 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
144
70.0
WAVE6110, H.265, HEVC, H.264, AVC, video codec IP for 4K and 8K New!
WAVE6110 is a 4K/8K multi-standard video codec HW IP that supports HEVC/H.265, AVC/H.264, video codec standard. It provides 8K30fps/4K120fps@550MHz r...
145
70.0
DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
146
70.0
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
147
70.0
LPDDR5X/5/4X/4 Memory Controller IP
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...
148
70.0
Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
Ceva-Waves Links is a versatile family of multi-protocol wireless platform IPs, encompassing the latest consumer wireless standards. It leverages the ...
149
60.0
WAVE637DV, AV1, H.265, HEVC, H.264, AVC, VP9 video codec IP for 4K
WAVE637DV is a 4K multi-standard video codec HW IP that supports AV1, HEVC/H.265, AVC/H.264, and VP9 video codec standard. It provides 4K60fps@500MHz ...
150
60.0
MIPI I3C PHY - TSMC (12nm, 7nm, 5nm, and 22nm) - GF 12nm
The I3C bus (incl. PHY) is used for various sensors in the mobile/automotive system where the Host transfers data and control between itself and vario...