1401 2.0

FortifyIQ Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection FortifyIQ’s Balanced AES IP core is a compact yet capable cryptographic accelerator designed for embedded systems with moderate performance and resour...

1402 2.0

FortifyIQ High-Throughput AES Core with Advanced SCA/FI Protection for Performance-Critical Systems FortifyIQ’s High-Performance AES IP core is a fast, silicon-proven cryptographic engine designed for systems with demanding encryption workloads. Buil...

1403 2.0

Super Speed USB 3.0 Extensible Host Controller xHCI ...

1404 2.0

TVM - Temperature/Voltage Monitor in 28nm CMOS The ODT-TVM-ULP-001C-28 is an ultra-low power temperature and voltage monitor designed in a standard 28nm CMOS process. The IP operates over the entir...

1405 2.0

TVM - Temperature/Voltage Monitor in 40nm CMOS The ODT-TVM-ULP-001C-40 is an ultra-low power temperature and voltage monitor designed in a standard 40nm CMOS process. The IP operates over the entir...

1406 1.0

1.2V Low Voltage Detector (LVD), Fujitsu 90nm The AR22F01 is a mass-production proven low voltage detector (LVD) IP. The LVD monitors analog pad power supply levels to prevent possible damage of c...

1407 1.0

10 Gigabit Ethernet XGMAC IP Arasan’s 10 Gigabit Ethernet Media Access Controller (XGMAC) IP is compliant with the Ethernet IEEE 802.3-2008 standard and provides an interface betw...

1408 1.0

I2C Bus Interface The serial controller interface (Single Master) core uses a two-wire bus for communicating between integrated circuits or standard peripherals like sm...

1409 1.0

I2C Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus) The Digital Blocks DB-I2C-MS-AXI Controller IP Core interfaces a microprocessor via the AXI system Interconnect Fabric to an I2C Bus. The I2C is a t...

1410 1.0

14-bit, 600 MSPS Ultra Low Power ADC in 28nm CMOS The ODT-ADP-14B600M-28 is a low power high speed pipelined ADC designed in a 28nm standard CMOS process, implemented using Omni Design's groundbreaki...

1411 1.0

16550D High Speed UART IP core - Universal Aysynchronous Receive/Transmit Arasan 16550D High Speed UART IP core is a 16550-compliant Universal Asynchronous Receiver/Transmitter (UART) with FIFO or expanded FIFO. The UART...

1412 1.0

PCIe 2.0 End Point IP Core - PCIe with FIFO Interface The Arasan PCI Express End Point is a high-speed, high-performance, and lowpowerIP core that is fully compliant to the PCI Express Specification 1.1 a...

1413 1.0

Serial Controller Interface Inicore’s iniSCI Slave is a synthesizable, flexible, and structured VHDL implementation of a Serial Controller Interface (SCI) that uses a two-wire bu...

1414 1.0

GF L013HP 130nm Clock Generator PLL - 105MHz-525MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1415 1.0

GF L013HP 130nm Clock Generator PLL - 210MHz-1050MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1416 1.0

GF L013HP 130nm Clock Generator PLL - 420MHz-2100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1417 1.0

GF L013HP 130nm DDR DLL - 120MHz-600MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1418 1.0

GF L013HP 130nm DDR DLL - 189MHz-945MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1419 1.0

GF L013HP 130nm DDR DLL - 90MHz-450MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1420 1.0

GF L013HP 130nm Deskew PLL - 105MHz-525MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1421 1.0

GF L013HP 130nm Deskew PLL - 210MHz-1050MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1422 1.0

GF L013HP 130nm Deskew PLL - 420MHz-2100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1423 1.0

GF L013HP 130nm General Purpose PLL - 210MHz-1050MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1424 1.0

GF L013HP 130nm Spread Spectrum PLL - 105MHz-525MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1425 1.0

GF L013HP 130nm Spread Spectrum PLL - 210MHz-1050MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1426 1.0

GF L013HP 130nm Spread Spectrum PLL - 420MHz-2100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1427 1.0

GF L013LP 130nm Clock Generator PLL - 180MHz-900MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1428 1.0

GF L013LP 130nm Clock Generator PLL - 45MHz-225MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1429 1.0

GF L013LP 130nm Clock Generator PLL - 90MHz-450MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1430 1.0

GF L013LP 130nm DDR DLL - 39MHz-195MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1431 1.0

GF L013LP 130nm DDR DLL - 52MHz-260MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1432 1.0

GF L013LP 130nm DDR DLL - 82MHz-410MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1433 1.0

GF L013LP 130nm Deskew PLL - 180MHz-900MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1434 1.0

GF L013LP 130nm Deskew PLL - 45MHz-225MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1435 1.0

GF L013LP 130nm Deskew PLL - 90MHz-450MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1436 1.0

GF L013LP 130nm General Purpose PLL - 90MHz-450MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1437 1.0

GF L013LP 130nm Spread Spectrum PLL - 180MHz-900MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1438 1.0

GF L013LP 130nm Spread Spectrum PLL - 45MHz-225MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1439 1.0

GF L013LP 130nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1440 1.0

GF L013LV 130nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1441 1.0

GF L013LV 130nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1442 1.0

GF L013LV 130nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1443 1.0

GF L013LV 130nm DDR DLL - 152MHz-760MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1444 1.0

GF L013LV 130nm DDR DLL - 72MHz-360MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1445 1.0

GF L013LV 130nm DDR DLL - 96MHz-480MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1446 1.0

GF L013LV 130nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1447 1.0

GF L013LV 130nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1448 1.0

GF L013LV 130nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1449 1.0

GF L013LV 130nm General Purpose PLL - 150MHz-750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

1450 1.0

GF L013LV 130nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...