1901 1.0

TSMC CL015LV 150nm Spread Spectrum PLL - 280MHz-1400MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1902 1.0

TSMC CL015LV 150nm Spread Spectrum PLL - 70MHz-350MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1903 1.0

TSMC CL018E 180nm Clock Generator PLL - 130MHz-650MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1904 1.0

TSMC CL018E 180nm Clock Generator PLL - 260MHz-1300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1905 1.0

TSMC CL018E 180nm Clock Generator PLL - 65MHz-325MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1906 1.0

TSMC CL018E 180nm DDR DLL - 120MHz-600MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1907 1.0

TSMC CL018E 180nm DDR DLL - 57MHz-285MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1908 1.0

TSMC CL018E 180nm DDR DLL - 76MHz-380MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1909 1.0

TSMC CL018E 180nm Deskew PLL - 130MHz-650MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1910 1.0

TSMC CL018E 180nm Deskew PLL - 260MHz-1300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1911 1.0

TSMC CL018E 180nm Deskew PLL - 65MHz-325MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1912 1.0

TSMC CL018E 180nm Spread Spectrum PLL - 130MHz-650MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1913 1.0

TSMC CL018E 180nm Spread Spectrum PLL - 260MHz-1300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1914 1.0

TSMC CL018E 180nm Spread Spectrum PLL - 65MHz-325MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1915 1.0

TSMC CL018G 180nm Clock Generator PLL - 110MHz-550MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1916 1.0

TSMC CL018G 180nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1917 1.0

TSMC CL018G 180nm Clock Generator PLL - 55MHz-275MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1918 1.0

TSMC CL018G 180nm DDR DLL - 42MHz-210MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1919 1.0

TSMC CL018G 180nm DDR DLL - 56MHz-280MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1920 1.0

TSMC CL018G 180nm DDR DLL - 88MHz-440MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1921 1.0

TSMC CL018G 180nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1922 1.0

TSMC CL018G 180nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1923 1.0

TSMC CL018G 180nm Deskew PLL - 55MHz-275MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1924 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 110MHz-550MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1925 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 220MHz-1100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1926 1.0

TSMC CL018G 180nm Spread Spectrum PLL - 55MHz-275MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1927 1.0

TSMC CL018LP 180nm Clock Generator PLL - 180MHz-900MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1928 1.0

TSMC CL018LP 180nm Clock Generator PLL - 45MHz-225MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1929 1.0

TSMC CL018LP 180nm Clock Generator PLL - 90MHz-450MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1930 1.0

TSMC CL018LP 180nm DDR DLL - 30MHz-150MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1931 1.0

TSMC CL018LP 180nm DDR DLL - 40MHz-200MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1932 1.0

TSMC CL018LP 180nm DDR DLL - 63MHz-315MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1933 1.0

TSMC CL018LP 180nm Deskew PLL - 180MHz-900MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1934 1.0

TSMC CL018LP 180nm Deskew PLL - 45MHz-225MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1935 1.0

TSMC CL018LP 180nm Deskew PLL - 90MHz-450MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1936 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 180MHz-900MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1937 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 45MHz-225MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1938 1.0

TSMC CL018LP 180nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1939 1.0

TSMC CL018LV 180nm Clock Generator PLL - 118MHz-590MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1940 1.0

TSMC CL018LV 180nm Clock Generator PLL - 236MHz-1180MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1941 1.0

TSMC CL018LV 180nm Clock Generator PLL - 59MHz-295MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

1942 1.0

TSMC CL018LV 180nm DDR DLL - 101MHz-505MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1943 1.0

TSMC CL018LV 180nm DDR DLL - 48MHz-240MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1944 1.0

TSMC CL018LV 180nm DDR DLL - 64MHz-320MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

1945 1.0

TSMC CL018LV 180nm Deskew PLL - 118MHz-590MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1946 1.0

TSMC CL018LV 180nm Deskew PLL - 236MHz-1180MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1947 1.0

TSMC CL018LV 180nm Deskew PLL - 59MHz-295MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

1948 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 118MHz-590MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1949 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 236MHz-1180MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

1950 1.0

TSMC CL018LV 180nm Spread Spectrum PLL - 59MHz-295MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...