2101 1.0

TSMC CLN90G 90nm Spread Spectrum PLL - 320MHz-1600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2102 1.0

TSMC CLN90G 90nm Spread Spectrum PLL - 80MHz-400MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2103 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 110MHz-550MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2104 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 220MHz-1100MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2105 1.0

TSMC CLN90GOD 90nm Clock Generator PLL - 440MHz-2200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2106 1.0

TSMC CLN90GOD 90nm DDR DLL - 129MHz-645MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2107 1.0

TSMC CLN90GOD 90nm DDR DLL - 172MHz-860MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2108 1.0

TSMC CLN90GOD 90nm DDR DLL - 272MHz-1360MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2109 1.0

TSMC CLN90GOD 90nm Deskew PLL - 110MHz-550MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2110 1.0

TSMC CLN90GOD 90nm Deskew PLL - 220MHz-1100MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2111 1.0

TSMC CLN90GOD 90nm Deskew PLL - 440MHz-2200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2112 1.0

TSMC CLN90GOD 90nm General Purpose PLL - 220MHz-1100MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2113 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 110MHz-550MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2114 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 220MHz-1100MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2115 1.0

TSMC CLN90GOD 90nm Spread Spectrum PLL - 440MHz-2200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2116 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 125MHz-625MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2117 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 250MHz-1250MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2118 1.0

TSMC CLN90GT 90nm Clock Generator PLL - 500MHz-2500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2119 1.0

TSMC CLN90GT 90nm DDR DLL - 159MHz-795MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2120 1.0

TSMC CLN90GT 90nm DDR DLL - 212MHz-1060MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2121 1.0

TSMC CLN90GT 90nm DDR DLL - 335MHz-1675MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2122 1.0

TSMC CLN90GT 90nm Deskew PLL - 125MHz-625MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2123 1.0

TSMC CLN90GT 90nm Deskew PLL - 250MHz-1250MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2124 1.0

TSMC CLN90GT 90nm Deskew PLL - 500MHz-2500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2125 1.0

TSMC CLN90GT 90nm General Purpose PLL - 250MHz-1250MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2126 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 125MHz-625MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2127 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 250MHz-1250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2128 1.0

TSMC CLN90GT 90nm Spread Spectrum PLL - 500MHz-2500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2129 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 120MHz-600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2130 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 240MHz-1200MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2131 1.0

TSMC CLN90LP 90nm Clock Generator PLL - 60MHz-300MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

2132 1.0

TSMC CLN90LP 90nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2133 1.0

TSMC CLN90LP 90nm DDR DLL - 164MHz-820MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2134 1.0

TSMC CLN90LP 90nm DDR DLL - 78MHz-390MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

2135 1.0

TSMC CLN90LP 90nm Deskew PLL - 120MHz-600MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2136 1.0

TSMC CLN90LP 90nm Deskew PLL - 240MHz-1200MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2137 1.0

TSMC CLN90LP 90nm Deskew PLL - 60MHz-300MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

2138 1.0

TSMC CLN90LP 90nm General Purpose PLL - 120MHz-600MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

2139 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2140 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2141 1.0

TSMC CLN90LP 90nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

2142 1.0

Stereo PCM to PWM Converter, SMIC 0.18um The AR35S18E is a digitally coded conversion IP that translates stereo 16-24bit pulse-code modulated (PCM) input data into pulse-width modulated (PWM)...

2143 1.0

RTP / UDP / IP Hardware Stack for H.264/H.265 NAL Video Streams Packet Processing The Digital Blocks DB-RTP-UDP-IP-NAL IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor...

2144 1.0

RTP / UDP / IP Hardware Stack for Raw, Uncompressed RGB/YUV Video Streams The Digital Blocks DB-RTP-UDP-IP-AV IP Core is a RTP/UDP/IP Protocol Hardware Stack with MAC Layer Pre- & Post-Processors and an ARP Packet Processor ...

2145 1.0

Super-Fast 8051 Microcontroller Core with Configurable Features and Peripherals The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configur...

2146 1.0

Super-Speed Plus USB 3.2 Hub Controller USB3.2 SuperSpeed Hub The Super Speed Plus USB bus is implemented as a separate dual-simplex dual lane data path consisting of two uni-directional di...

2147 0.3729

A bridge to convert the slave SPI interface to the master I2C interface and vice versa The dti_spi_to_i2c is a bridge to convert the slave SPI interface to the master I2C interface and vice versa....

2148 0.3729

A bridge to convert the slave SPI interface to the master UART interface and vice versa The dti_spi_to_uart is a bridge to convert the slave SPI interface to the master UART interface and vice versa....

2149 0.3729

A memory BIST solution which has been optimized for Dolphin memories Dolphin Technology now provides a memory BIST solution which has been optimized for Dolphin memories. It supports all Dolphin memory compilers, includ...

2150 0.3729

2 Ports RW Register File (2 Ports RF) Compiler with Column Redundancy Option, supports process G/LV Memory Compilers...