Design & Reuse
4793 IP
3251
0.0
UMC L110AELL 110nm Clock Generator PLL - 30MHz-150MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3252
0.0
UMC L110AELL 110nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3253
0.0
UMC L110AELL 110nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3254
0.0
UMC L110AELL 110nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3255
0.0
UMC L110AELL 110nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3256
0.0
UMC L110AELL 110nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3257
0.0
UMC L110AELL 110nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3258
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3259
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 30MHz-150MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3260
0.0
UMC L110AELL 110nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3261
0.0
UMC L110HS 110nm Clock Generator PLL - 160MHz-800MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3262
0.0
UMC L110HS 110nm Clock Generator PLL - 320MHz-1600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3263
0.0
UMC L110HS 110nm Clock Generator PLL - 80MHz-400MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3264
0.0
UMC L110HS 110nm DDR DLL - 104MHz-520MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3265
0.0
UMC L110HS 110nm DDR DLL - 78MHz-390MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3266
0.0
UMC L110HS 110nm Deskew PLL - 160MHz-800MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3267
0.0
UMC L110HS 110nm Deskew PLL - 320MHz-1600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3268
0.0
UMC L110HS 110nm Deskew PLL - 80MHz-400MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3269
0.0
UMC L110HS 110nm Spread Spectrum PLL - 160MHz-800MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3270
0.0
UMC L110HS 110nm Spread Spectrum PLL - 320MHz-1600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3271
0.0
UMC L110HS 110nm Spread Spectrum PLL - 80MHz-400MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3272
0.0
UMC L110LL 110nm Clock Generator PLL - 120MHz-600MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3273
0.0
UMC L110LL 110nm Clock Generator PLL - 30MHz-150MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3274
0.0
UMC L110LL 110nm Clock Generator PLL - 60MHz-300MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3275
0.0
UMC L110LL 110nm DDR DLL - 24MHz-120MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3276
0.0
UMC L110LL 110nm DDR DLL - 32MHz-160MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3277
0.0
UMC L110LL 110nm Deskew PLL - 120MHz-600MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3278
0.0
UMC L110LL 110nm Deskew PLL - 30MHz-150MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3279
0.0
UMC L110LL 110nm Deskew PLL - 60MHz-300MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3280
0.0
UMC L110LL 110nm Spread Spectrum PLL - 120MHz-600MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3281
0.0
UMC L110LL 110nm Spread Spectrum PLL - 30MHz-150MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3282
0.0
UMC L110LL 110nm Spread Spectrum PLL - 60MHz-300MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3283
0.0
UMC L110SP 110nm Clock Generator PLL - 118MHz-590MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3284
0.0
UMC L110SP 110nm Clock Generator PLL - 236MHz-1180MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3285
0.0
UMC L110SP 110nm Clock Generator PLL - 59MHz-295MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3286
0.0
UMC L110SP 110nm DDR DLL - 57MHz-285MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3287
0.0
UMC L110SP 110nm DDR DLL - 76MHz-380MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3288
0.0
UMC L110SP 110nm Deskew PLL - 118MHz-590MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3289
0.0
UMC L110SP 110nm Deskew PLL - 236MHz-1180MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3290
0.0
UMC L110SP 110nm Deskew PLL - 59MHz-295MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...
3291
0.0
UMC L110SP 110nm Spread Spectrum PLL - 118MHz-590MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3292
0.0
UMC L110SP 110nm Spread Spectrum PLL - 236MHz-1180MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3293
0.0
UMC L110SP 110nm Spread Spectrum PLL - 59MHz-295MHz
The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...
3294
0.0
UMC L28EHV 28nm Clock Generator PLL - 150MHz-750MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3295
0.0
UMC L28EHV 28nm Clock Generator PLL - 300MHz-1500MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3296
0.0
UMC L28EHV 28nm Clock Generator PLL - 600MHz-3000MHz
The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...
3297
0.0
UMC L28EHV 28nm DDR DLL - 130MHz-650MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3298
0.0
UMC L28EHV 28nm DDR DLL - 205MHz-1025MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3299
0.0
UMC L28EHV 28nm DDR DLL - 98MHz-490MHz
The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...
3300
0.0
UMC L28EHV 28nm Deskew PLL - 150MHz-750MHz
The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...