351 20.0

HDMI1.4 RX PHY Silicon Library's HDMI 1.4b RX IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC55/65, GF55/65 and UM...

352 20.0

HDMI1.4 TX PHY Silicon Library's HDMI 1.4b TX PHY IP supports up to 3Gbps. This silicon proven IP is available in various fabs/nodes including TSMC40/55/65/85/90/11...

353 20.0

HDMI2.0 RX PHY Silicon Library's HDMI 2.0 RX IP supports up to 6Gbps. This silicon proven IP is available in TSMC12/40. Please also refer to our LINK IP....

354 20.0

HDMI2.0 TX PHY Silicon Library's HDMI 2.0 TX PHY IP supports up to 6Gbps. This silicon proven IP is available in TSMC12. Please also refer to our LINK IP....

355 20.0

FEC As serial link speeds have increased, the reach achievable has become more and more limited by the lossy nature of the physical media which introduces...

356 20.0

Temperature Sensor Deep NWELL, TSMC N3EP A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an ...

357 20.0

VESA VDC-M V1.2 Decoder Embrace the future of digital media with Arasan's VESA VDC-M v1.2 Decoder. Our groundbreaking product revolutionizes video compression technology, off...

358 20.0

VESA VDC-M Decoder The Video Electronics Standards Association (VESA®) introduced the VESA Display Compression-M (VDC-M) standard, a new display interface compression st...

359 20.0

GF 6-bit, 10 GSPS Analog to Digital Converter (ADC) IP block GlobalFoundries 22nm The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a flash-type ADC, with 6-bit re...

360 20.0

UHS-II PHY Silicon Library's world-first silicon proven UHS-II PHY supporting 1.56Gbps speed is available in various fabs/nodes, including TSMC6/12/40/85, GF28, ...

361 20.0

High Performance HBM, HBM3 Memory Controller OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as an integrated solutio...

362 20.0

High-Performance AES-GCM/CTR IP The compact, high-performance Synopsys Pipelined AES-GCM/CTR Core implements the AES-GCM/CTR algorithm as specified in the National Institute of Stand...

363 20.0

High-Performance AES-XTS/ECB IP Memory and storage security involves protecting storage resources and the data stored on them, both on-premises and in external data centers and the c...

364 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

365 20.0

MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

366 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm, N6, N6C, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

367 20.0

MIPI C-PHY v1.2 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (16nm, 12nm, N7, N6, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

368 20.0

MIPI C-PHY v1.2 D-PHY v2.1 TX 2 trios/2 Lanes in TSMC (16nm, 12nm, N5) Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral...

369 20.0

MIPI CSI-2 host/device controllers for high-speed serial interface between image processor and camera sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

370 20.0

MIPI CSI-2 Tansmitter v 1.3, C-PHY compatible The MIPI Camera Serial Interface (CSI-2) Transmitter, typically resides in a mobile platform’s camera module, and communicates over a D-PHY/C-PHY link...

371 20.0

MIPI D-PHY Bidirectional 2 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

372 20.0

MIPI D-PHY Bidirectional 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

373 20.0

MIPI D-PHY Bidirectional 2 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

374 20.0

MIPI D-PHY Bidirectional 4 Lanes in Fujitsu (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

375 20.0

MIPI D-PHY Bidirectional 4 Lanes in GF (40nm, 28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

376 20.0

MIPI D-PHY Bidirectional 4 Lanes in SMIC (40nm, 28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

377 20.0

MIPI D-PHY Bidirectional 4 Lanes in TSMC (40nm, 28nm, 16nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

378 20.0

MIPI D-PHY RX Silicon Library's MIPI DPHY 1.2 Rx PHY IP supports data rates up to 1.5Gbps. This IP includes two PLLs. This silicon proven IP is available in variou...

379 20.0

MIPI D-PHY Rx-Only 2 Lanes in GF (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

380 20.0

MIPI D-PHY Rx-Only 2 Lanes in SMIC (40nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

381 20.0

MIPI D-PHY Rx-Only 2 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

382 20.0

MIPI D-PHY Rx-Only 2 Lanes in UMC (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

383 20.0

MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

384 20.0

MIPI D-PHY Rx-Only 4 Lanes in SMIC (40nm, 28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

385 20.0

MIPI D-PHY Rx-Only 4 Lanes in TSMC (40nm, 28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

386 20.0

MIPI D-PHY Rx-Only 4 Lanes in UMC (28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

387 20.0

MIPI D-PHY TX Silicon Library's MIPI DPHY 1.2 Tx PHY IP supports data rates up to 1.5Gbps and 2.5Gbps per lane (in HS), depending on the technology node. This sili...

388 20.0

MIPI D-PHY Tx-Only 2 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

389 20.0

MIPI D-PHY Tx-Only 4 Lanes in GF (12nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

390 20.0

MIPI D-PHY Tx-Only 4 Lanes in SMIC (28nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

391 20.0

MIPI D-PHY Tx-Only 4 Lanes in TSMC (28nm, 22nm, 16nm, 12nm, N7, N6, N6C) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

392 20.0

MIPI D-PHY Tx-Only 4 Lanes in UMC (28nm, 22nm) Synopsys’ IP D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband processors, and peripheral devices for m...

393 20.0

MIPI DSI-2 controllers with VESA DSC for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

394 20.0

MIPI DSI-2 host/device controllers for high-speed serial interface between application processor and displays Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

395 20.0

MIPI I3C controller delivers high bandwidth and scalability for integration of multiple sensors Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

396 20.0

MIPI M-PHY G4 Type 1 1Tx1RX in TSMC (16nm, 12nm, N5) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

397 20.0

MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

398 20.0

MIPI M-PHY G5 Type 1 2Tx2Rx in Samsung (14nm) The silicon-proven Synopsys MIPI® M-PHY IP, compliant with the latest MIPI M-PHY v5.0 specification, supports speeds up to 23.32 Gbps per lane. The I...

399 20.0

MIPI UniPro IP for reliable, high-performance and low power link between devices in mobile devices Synopsys MIPI® IP solution enables low-power and high-performance interface between system-on-chips (SoCs), application processors, baseband processor...

400 20.0

eMMC 5.1 Host Controller The eMMC 5.1 Host Controller IP from Arasan Chip Systems is a highly integrated host controller IP solution. This IP handles all of the timing and ...