3851 0.0

TSMC CLN12FFCLL 12nm Deskew PLL - 400MHz-2000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3852 0.0

TSMC CLN12FFCLL 12nm Deskew PLL - 800MHz-4000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3853 0.0

TSMC CLN12FFCLL 12nm General Purpose PLL - 400MHz-2000MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3854 0.0

TSMC CLN12FFCLL 12nm IoT PLL - 30MHz-1000MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

3855 0.0

TSMC CLN12FFCLL 12nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3856 0.0

TSMC CLN12FFCLL 12nm LPDDR4 PHY - 4266Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3857 0.0

TSMC CLN12FFCLL 12nm LPDDR5 PHY - 6400Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3858 0.0

TSMC CLN12FFCLL 12nm Multi Phase DLL - 200MHz-1000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3859 0.0

TSMC CLN12FFCLL 12nm Multi Phase DLL - 400MHz-2000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3860 0.0

TSMC CLN12FFCLL 12nm Multi Phase DLL - 800MHz-4000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3861 0.0

TSMC CLN12FFCLL 12nm Spread Spectrum PLL - 175MHz-875MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3862 0.0

TSMC CLN12FFCLL 12nm Spread Spectrum PLL - 350MHz-1750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3863 0.0

TSMC CLN12FFCLL 12nm Spread Spectrum PLL - 700MHz-3500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3864 0.0

TSMC CLN12FFCLL 12nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

3865 0.0

TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 1200MHz-6000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3866 0.0

TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3867 0.0

TSMC CLN12FFCLLLVT 12nm Clock Generator PLL - 600MHz-3000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3868 0.0

TSMC CLN12FFCLLLVT 12nm DDR DLL - 270MHz-1350MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3869 0.0

TSMC CLN12FFCLLLVT 12nm DDR DLL - 360MHz-1800MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3870 0.0

TSMC CLN12FFCLLLVT 12nm DDR DLL - 568MHz-2840MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3871 0.0

TSMC CLN12FFCLLLVT 12nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3872 0.0

TSMC CLN12FFCLLLVT 12nm DDR4 PHY - 4266Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3873 0.0

TSMC CLN12FFCLLLVT 12nm DDR5 PHY - 6400Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3874 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 1200MHz-6000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3875 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3876 0.0

TSMC CLN12FFCLLLVT 12nm Deskew PLL - 600MHz-3000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

3877 0.0

TSMC CLN12FFCLLLVT 12nm General Purpose PLL - 600MHz-3000MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

3878 0.0

TSMC CLN12FFCLLLVT 12nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3879 0.0

TSMC CLN12FFCLLLVT 12nm LPDDR4 PHY - 4266Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3880 0.0

TSMC CLN12FFCLLLVT 12nm LPDDR5 PHY - 6400Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3881 0.0

TSMC CLN12FFCLLLVT 12nm Multi Phase DLL - 1200MHz-6000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3882 0.0

TSMC CLN12FFCLLLVT 12nm Multi Phase DLL - 300MHz-1500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3883 0.0

TSMC CLN12FFCLLLVT 12nm Multi Phase DLL - 600MHz-3000MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

3884 0.0

TSMC CLN12FFCLLLVT 12nm Spread Spectrum PLL - 1050MHz-5250MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3885 0.0

TSMC CLN12FFCLLLVT 12nm Spread Spectrum PLL - 262MHz-1310MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3886 0.0

TSMC CLN12FFCLLLVT 12nm Spread Spectrum PLL - 524MHz-2620MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

3887 0.0

TSMC CLN12FFCLLLVT 12nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

3888 0.0

TSMC CLN12FFCP 12nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3889 0.0

TSMC CLN12FFCP 12nm DDR4 PHY - 4266Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3890 0.0

TSMC CLN12FFCP 12nm DDR5 PHY - 6400Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

3891 0.0

TSMC CLN12FFCP 12nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3892 0.0

TSMC CLN12FFCP 12nm LPDDR4 PHY - 4266Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3893 0.0

TSMC CLN12FFCP 12nm LPDDR5 PHY - 6400Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

3894 0.0

TSMC CLN16FF+GL 16nm Clock Generator PLL - 200MHz-1000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3895 0.0

TSMC CLN16FF+GL 16nm Clock Generator PLL - 400MHz-2000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3896 0.0

TSMC CLN16FF+GL 16nm Clock Generator PLL - 800MHz-4000MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

3897 0.0

TSMC CLN16FF+GL 16nm DDR DLL - 188MHz-940MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3898 0.0

TSMC CLN16FF+GL 16nm DDR DLL - 250MHz-1250MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3899 0.0

TSMC CLN16FF+GL 16nm DDR DLL - 395MHz-1975MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

3900 0.0

TSMC CLN16FF+GL 16nm Deskew PLL - 200MHz-1000MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...