4351 0.0

TSMC CLN40LP 40nm LPDDR4 PHY - 2933Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4352 0.0

TSMC CLN40LP 40nm LPDDR5 PHY - 3200Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4353 0.0

TSMC CLN40LP 40nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

4354 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4355 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4356 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4357 0.0

TSMC CLN40LP+ 40nm DDR DLL - 112MHz-560MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4358 0.0

TSMC CLN40LP+ 40nm DDR DLL - 177MHz-885MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4359 0.0

TSMC CLN40LP+ 40nm DDR DLL - 84MHz-420MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4360 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4361 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4362 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4363 0.0

TSMC CLN40LP+ 40nm General Purpose PLL - 150MHz-750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

4364 0.0

TSMC CLN40LP+ 40nm IoT PLL - 30MHz-375MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

4365 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 150MHz-750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4366 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 300MHz-1500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4367 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 75MHz-375MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4368 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4369 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4370 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 75MHz-375MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4371 0.0

TSMC CLN40LP+ 40nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

4372 0.0

TSMC CLN40LPP 40nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4373 0.0

TSMC CLN40LPP 40nm DDR4 PHY - 2933Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4374 0.0

TSMC CLN40LPP 40nm DDR5 PHY - 3200Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4375 0.0

TSMC CLN40LPP 40nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4376 0.0

TSMC CLN40LPP 40nm LPDDR4 PHY - 2933Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4377 0.0

TSMC CLN40LPP 40nm LPDDR5 PHY - 3200Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4378 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4379 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 37MHz-187MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4380 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4381 0.0

TSMC CLN40ULP 40nm DDR DLL - 42MHz-210MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4382 0.0

TSMC CLN40ULP 40nm DDR DLL - 56MHz-280MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4383 0.0

TSMC CLN40ULP 40nm DDR DLL - 88MHz-440MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4384 0.0

TSMC CLN40ULP 40nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4385 0.0

TSMC CLN40ULP 40nm DDR4 PHY - 2933Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4386 0.0

TSMC CLN40ULP 40nm DDR5 PHY - 3200Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4387 0.0

TSMC CLN40ULP 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4388 0.0

TSMC CLN40ULP 40nm Deskew PLL - 37MHz-187MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4389 0.0

TSMC CLN40ULP 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4390 0.0

TSMC CLN40ULP 40nm General Purpose PLL - 75MHz-375MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

4391 0.0

TSMC CLN40ULP 40nm IoT PLL - 30MHz-375MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

4392 0.0

TSMC CLN40ULP 40nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4393 0.0

TSMC CLN40ULP 40nm LPDDR4 PHY - 2933Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4394 0.0

TSMC CLN40ULP 40nm LPDDR5 PHY - 3200Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4395 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 150MHz-750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4396 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 37MHz-187MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4397 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 75MHz-375MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4398 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4399 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 37MHz-187MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4400 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 75MHz-375MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...