4901 0.0

TSMC CLN40LP 40nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

4902 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4903 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4904 0.0

TSMC CLN40LP+ 40nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4905 0.0

TSMC CLN40LP+ 40nm DDR DLL - 112MHz-560MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4906 0.0

TSMC CLN40LP+ 40nm DDR DLL - 177MHz-885MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4907 0.0

TSMC CLN40LP+ 40nm DDR DLL - 84MHz-420MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4908 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4909 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4910 0.0

TSMC CLN40LP+ 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4911 0.0

TSMC CLN40LP+ 40nm General Purpose PLL - 150MHz-750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

4912 0.0

TSMC CLN40LP+ 40nm IoT PLL - 30MHz-375MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

4913 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 150MHz-750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4914 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 300MHz-1500MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4915 0.0

TSMC CLN40LP+ 40nm Multi Phase DLL - 75MHz-375MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4916 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4917 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4918 0.0

TSMC CLN40LP+ 40nm Spread Spectrum PLL - 75MHz-375MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4919 0.0

TSMC CLN40LP+ 40nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

4920 0.0

TSMC CLN40LPP 40nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4921 0.0

TSMC CLN40LPP 40nm DDR4 PHY - 2933Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4922 0.0

TSMC CLN40LPP 40nm DDR5 PHY - 3200Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4923 0.0

TSMC CLN40LPP 40nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4924 0.0

TSMC CLN40LPP 40nm LPDDR4 PHY - 2933Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4925 0.0

TSMC CLN40LPP 40nm LPDDR5 PHY - 3200Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4926 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4927 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 37MHz-187MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4928 0.0

TSMC CLN40ULP 40nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

4929 0.0

TSMC CLN40ULP 40nm DDR DLL - 42MHz-210MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4930 0.0

TSMC CLN40ULP 40nm DDR DLL - 56MHz-280MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4931 0.0

TSMC CLN40ULP 40nm DDR DLL - 88MHz-440MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

4932 0.0

TSMC CLN40ULP 40nm DDR3 PHY - 2133Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4933 0.0

TSMC CLN40ULP 40nm DDR4 PHY - 2933Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4934 0.0

TSMC CLN40ULP 40nm DDR5 PHY - 3200Mbps The TCI DDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin individ...

4935 0.0

TSMC CLN40ULP 40nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4936 0.0

TSMC CLN40ULP 40nm Deskew PLL - 37MHz-187MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4937 0.0

TSMC CLN40ULP 40nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

4938 0.0

TSMC CLN40ULP 40nm General Purpose PLL - 75MHz-375MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

4939 0.0

TSMC CLN40ULP 40nm IoT PLL - 30MHz-375MHz The IoT PLL is designed for very low power, sipping only 45uW at 30MHz and running from core power. It has a wide frequency range with multiplication ...

4940 0.0

TSMC CLN40ULP 40nm LPDDR3 PHY - 2133Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4941 0.0

TSMC CLN40ULP 40nm LPDDR4 PHY - 2933Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4942 0.0

TSMC CLN40ULP 40nm LPDDR5 PHY - 3200Mbps The TCI LPDDR PHY is a high-performance, scalable system using a radically new architecture that continuously and automatically adjusts each pin indiv...

4943 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 150MHz-750MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4944 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 37MHz-187MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4945 0.0

TSMC CLN40ULP 40nm Multi Phase DLL - 75MHz-375MHz The Multi Phase DLL is designed for high-speed interface applications. The DLL generates precise multi-phase clocks directly from the reference clock....

4946 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4947 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 37MHz-187MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4948 0.0

TSMC CLN40ULP 40nm Spread Spectrum PLL - 75MHz-375MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

4949 0.0

TSMC CLN40ULP 40nm Ultra PLL - 15MHz-3000MHz The Ultra PLL is designed with a state-of-the-art architecture using high-speed digital and analog circuits that offers exceptional performance, featu...

4950 0.0

TSMC CLN40ULPOD 40nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...