5151 1.0

GF L90G 90nm Spread Spectrum PLL - 120MHz-600MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5152 1.0

GF L90G 90nm Spread Spectrum PLL - 240MHz-1200MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5153 1.0

GF L90G 90nm Spread Spectrum PLL - 60MHz-300MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5154 1.0

GF L90GOD 90nm Clock Generator PLL - 180MHz-900MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5155 1.0

GF L90GOD 90nm Clock Generator PLL - 360MHz-1800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5156 1.0

GF L90GOD 90nm Clock Generator PLL - 90MHz-450MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5157 1.0

GF L90GOD 90nm DDR DLL - 129MHz-645MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5158 1.0

GF L90GOD 90nm DDR DLL - 172MHz-860MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5159 1.0

GF L90GOD 90nm DDR DLL - 272MHz-1360MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5160 1.0

GF L90GOD 90nm Deskew PLL - 180MHz-900MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5161 1.0

GF L90GOD 90nm Deskew PLL - 360MHz-1800MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5162 1.0

GF L90GOD 90nm Deskew PLL - 90MHz-450MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5163 1.0

GF L90GOD 90nm General Purpose PLL - 180MHz-900MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

5164 1.0

GF L90GOD 90nm Spread Spectrum PLL - 180MHz-900MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5165 1.0

GF L90GOD 90nm Spread Spectrum PLL - 360MHz-1800MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5166 1.0

GF L90GOD 90nm Spread Spectrum PLL - 90MHz-450MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5167 1.0

GF L90LP 90nm Clock Generator PLL - 150MHz-750MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5168 1.0

GF L90LP 90nm Clock Generator PLL - 300MHz-1500MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5169 1.0

GF L90LP 90nm Clock Generator PLL - 75MHz-375MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5170 1.0

GF L90LP 90nm DDR DLL - 124MHz-620MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5171 1.0

GF L90LP 90nm DDR DLL - 196MHz-980MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5172 1.0

GF L90LP 90nm DDR DLL - 93MHz-465MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...

5173 1.0

GF L90LP 90nm Deskew PLL - 150MHz-750MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5174 1.0

GF L90LP 90nm Deskew PLL - 300MHz-1500MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5175 1.0

GF L90LP 90nm Deskew PLL - 75MHz-375MHz The Deskew PLL is designed to eliminate the skew between the output of a clock distribution tree and a clock reference. The PLL can also multiply the ...

5176 1.0

GF L90LP 90nm General Purpose PLL - 150MHz-750MHz The General Purpose PLL is a wide range clock multiplier with deskew capability. It contains a 1-16 divider at the reference clock input, a 1-64 divid...

5177 1.0

GF L90LP 90nm Spread Spectrum PLL - 150MHz-750MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5178 1.0

GF L90LP 90nm Spread Spectrum PLL - 300MHz-1500MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5179 1.0

GF L90LP 90nm Spread Spectrum PLL - 75MHz-375MHz The Spread Spectrum PLL is designed to multiply an input clock by a fixed-point number between 92 and 184 with frequency spreading capability suitable...

5180 1.0

UFS 2.1 Device Controller compatible with MIPI M-PHY 3.1 and UniPro 1.6 Arasan Chip Systems is a leading SoC IP provider of a complete suite of JEDEC UFS compliant IP solutions, which consist of IP cores, verification IP, ...

5181 1.0

UFS 2.1 Host Controller compatible with M-PHY 3.1 and UniPro 1.6 Arasan's Universal Flash Storage 2.1 (UFS 2.1) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...

5182 1.0

UFS 3.0 Host Controller compatible with M-PHY 4.0 and UniPro 1.8 Arasan's Universal Flash Storage 3.0 (UFS 3.0) is a simple but high performance, serial interface primarily used in mobile systems, between host proce...

5183 1.0

Gigabit Ethernet MAC with AVB The Arasan Gigabit Ethernet Media Access Controller IP is compliant with the Ethernet IEEE 802.3-2008 standard. In addition, the Gigabit Ethernet MAC...

5184 1.0

Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto The Gigabit Ethernet Media Access Controller with IEEE 1588 PTP IP core is compliant to the Ethernet/IEEE 802.3-2008 standard and has hardware based ...

5185 1.0

MIPI D-PHY Rx ONLY v1.1 @1.5ghz Ultra Low Power & Low Area for IoT & Wearables Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. Arasan’s D-PHY IP is a...

5186 1.0

MIPI D-PHY Rx ONLY v1.1 @1.5ghz Ultra Low Power & Low Area for IoT & Wearables Arasan 2nd Generation MIPI D-PHY v1.1 IP supporting speeds of up to 1.5 Gbps on TSMC 22nm process technology for SoC designs. Arasan’s D-PHY IP is a...

5187 1.0

MIPI HSI Controller - (High-Speed Synchronous Serial Interface) The High Speed Synchronous Serial Interface (HSI) Controller is used to provide high bandwidth, point-to-point, serial communication between two peers...

5188 1.0

MIPI LLI Controller - (Low Latency Interface) The Low Latency interface (LLI) is a point-to point-interconnect that allows two devices on the separate chips to communicate as if a device attached ...

5189 1.0

MIPI SLIMbus Device Controller V2.0 The Arasan SLIMbus Device Controller IP is designed to provide MIPI SLIMbus 1.01 compliant connectivity for a peripheral device, like an audio codec, ...

5190 1.0

MIPI SLIMbus Host Controller v2.0 The MIPI SLIMbus Host typically resides in a mobile platform’s application processor and provides two-wire, multi-drop connectivity with multiple audi...

5191 1.0

MIPI SoundWire Master Controller 1.1 The Total MIPI Soundwire IP Solution enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package t...

5192 1.0

MIPI SoundWire Slave Controller 1.1 The Total MIPI Soundwire IP Solution enables early adopters the fastest path to adoption of this new standard by offering a comprehensive IP package t...

5193 1.0

MIPI UniPro Controller - v1.6 To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to define and promote open...

5194 1.0

MIPI UniPro Stack - v1.6 To address the explosive growth in the mobile industry, the Mobile Industry Processor Interface (MIPI) Alliance was created to define and promote open...

5195 1.0

BitBLT Graphics Hardware Accelerator (AHB Bus) The Digital Blocks DB9100AHB BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to ...

5196 1.0

BitBLT Graphics Hardware Accelerator (AXI Bus) The Digital Blocks DB9100AXI3 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to...

5197 1.0

UMC L130HS 130nm Clock Generator PLL - 160MHz-800MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5198 1.0

UMC L130HS 130nm Clock Generator PLL - 320MHz-1600MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5199 1.0

UMC L130HS 130nm Clock Generator PLL - 80MHz-400MHz The Clock Generator PLL is designed to multiply an input clock by an integer between 1 and 4096. It does not provide any deskew functionality. It cont...

5200 1.0

UMC L130HS 130nm DDR DLL - 104MHz-520MHz The DDR DLL uses a reference clock to establish a time base in order to delay arbitrary (nonperiodic) strobe signals by precise fractions of the clock...