6401 0.0

M25 DSC 1.2 Decoder The Display Stream Compression (DSC) standard from the Video Electronics Standards Association (VESA) offers visually lossless compression for high de...

6402 0.0

M27 DSC 1.2a Encoder The Trilinear Technologies M27 DSC 1.2 Encoder offers real time compression of high definition streams with resoltions up to 8K. The Display Stream Co...

6403 0.0

I2C Host / Device Bus Controller The synchronous I2C interface is a block that interconnects an APB bus. The APB - I2C Bridge interfaces to the APB bus on the system side and the I2C ...

6404 0.0

I2C Master Controller w/FIFO (AHB & AHB-Lite Bus) The Digital Blocks DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AP...

6405 0.0

I2C Master Controller w/FIFO (AXI & AXI-Lite Bus) The Digital Blocks DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC, or other high performance microprocessor via the AMBA 2.0 AX...

6406 0.0

I2C Slave Controller - Low Power, Low Noise Config with APB Interface The Digital Blocks DB-I2C-S-SCL-CLK-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA...

6407 0.0

I2C Slave Controller w/FIFO (AHB Bus) The Digital Blocks DB-I2C-S-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0/3.0...

6408 0.0

I2C Slave Controller w/FIFO (APB Bus) The Digital Blocks DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2.0 APB...

6409 0.0

I2C Slave Controller w/FIFO (AXI Bus) The Digital Blocks DB-I2C-S-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 4/3 AXI...

6410 0.0

I2C Slave Controller with User Register Array / Memory / FIFO / AMBA Interface The DB-I2C-S-REG is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs interfacing to user registers while autonomous i...

6411 0.0

I2C/SMBus Master/Slave Controller w/FIFO (AXI/AHB/APB) The Digital Blocks DB-I2C-SMBus-MS-AMBA Controller IP Core is an I2C/SMBus Master/Slave Controller, interfacing a microprocessor via the AMBA AXI, AHB...

6412 0.0

D2D PHY, ADVANCED PACKAGE, 3nm The InPsytech (IPT) D2D PHY IP is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed...

6413 0.0

D2D PHY, ADVANCED PACKAGE, 5nm/4nm The InPsytech (IPT) D2D PHY is a mass-production proven, state-of-the-art physical layer interface designed to provide exceptional performance and eff...

6414 0.0

D2D PHY, ADVANCED PACKAGE, 7nm/6nm The InPsytech (IPT) D2D PHY is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed da...

6415 0.0

D2D PHY, STANDARD PACKAGE, 7nm/6nm The InPsytech (IPT) D2D PHY is a state-of-the-art physical layer interface designed to provide exceptional performance and efficiency in high-speed da...

6416 0.0

32G LR Multi-Protocol SerDes (MPS) PHY Designed to meet the power efficiency and performance requirements of next-generation, high-speed wireline and wireless 5G infrastructure The 32G MPS...

6417 0.0

32G UCIe Standard PHY for TSMC N3P UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6418 0.0

32KHz input frequency Synthesizer PLL The MXL-PLL-SYN-LIF-DC is a high performance PLL based frequency synthesizer implemented using digital CMOS technology. It is highly integrated and re...

6419 0.0

E31 Balanced performance and efficiency RISC V core The SiFive E31 Standard Core is the world's most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of th...

6420 0.0

E34 Standard RISC V Core The SiFive E34 Standard Core adds single-precision floating-point to the SiFive E31 Standard Core, the world's most deployed RISC-V core. The E34...

6421 0.0

I3C HDK The I3C Total IP in a box HDK gives I3C SoC developers all the resources they need to implement MIPI I3C specifications right out of the box. The HDK...

6422 0.0

I3C Master / Slave Controller w/FIFO (APB Bus) The Digital Blocks DB-I3C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improv...

6423 0.0

I3C Master Controller w/FIFO (APB Bus) The Digital Blocks DB-I3C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improv...

6424 0.0

I3C Slave Controller w/FIFO (APB Bus) The Digital Blocks DB-I3C-S-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I3C Bus, compliant to the MIPI I3C – Improve...

6425 0.0

64-bit embedded processor, fully compliant with the RISC-V ISA SiFive’s E51 Coreplex is a 64-bit embedded processor, fully compliant with the RISC-V ISA. An extremely small-footprint, low-power design makes the ...

6426 0.0

S51 Low-power 64-bit MCU RISC V core The SiFive S51 Standard Core is a 64-bit embedded processor, fully compliant with the RISC-V ISA. A small-footprint, low-power design makes the S51 id...

6427 0.0

S54 64-bit embedded RISC V processor The SiFive S54 Standard Core is a 64-bit embedded processor that is fully-compliant with the RISC-V ISA. It adds support for the F and D standard exte...

6428 0.0

U54 Linux-capable RISC V application processor The SiFive U54 Standard Core is a single-core instantiation of the world's first RISC-V application processor, capable of supporting full-feature...

6429 0.0

U54 MC Multicore: four U54 cores and one S51 core The SiFive U54-MC Standard Core is the world's first RISC-V application processor, capable of supporting full-featured operating systems such as ...

6430 0.0

15GHz-20GHz Voltage Controlled Oscillator The GEV03 is 15 to 20 GHz broadband VCO designed on 2 um GaAs HBT process. The device is designed for high frequency applications. The resonator part ...

6431 0.0

16-22Bit 97dB Stereo Audio CODEC with Linein/Digital and Analog Microphone Recording, Lineout/Headphone/Speaker Playback, SMIC 65nmll The AR82S01 is a silicon-proven, low-power, ultra compact 16-22bit stereo audio CODEC IP fabricated in SMIC 65nmll logic process. The CODEC IP core em...

6432 0.0

16G Ethernet SerDes PHY Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...

6433 0.0

16G Multi-Protocol SerDes (MPS) PHY Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 1...

6434 0.0

16G UCIe Advanced PHY for TSMC N3P UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6435 0.0

16G UCIe Advanced PHY for TSMC N4P/N5P UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6436 0.0

16G UCIe Standard PHY for Samsung SF5A UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6437 0.0

16G UCIe Standard PHY for TSMC N3A Automotive UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6438 0.0

16G UCIe Standard PHY for TSMC N4P UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6439 0.0

16G UCIe Standard PHY for TSMC N5A Automotive UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6440 0.0

16G UCIe Standard PHY for TSMC N7 UCIe enables chiplet industry standard interoperability combined with ultra-low latency, extreme power efficiency, and high performance The Cadence® ...

6441 0.0

56G-LR Pam4 SerDes for TSMC N6/N7 56G LR SerDes PHY provides exceptional performance w/ best-in-class power & area, making it ideal for machine learning and 5G The Cadence 56Gbps Long...

6442 0.0

U74 High performance Linux-capable RISC V processor The SiFive U74 Standard Core is a single-core instantiation of the world's highest performance RISC-V application processor, capable of supportin...

6443 0.0

U74-MC Multicore: four U74 cores and one S76 core The SiFIve U74-MC Standard Core is the world's highest performance RISC-V application processor, capable of supporting full-featured operating sy...

6444 0.0

E76 High performance 32-bit embedded processor The SiFive E76 Standard Core is a high-performance 32-bit embedded processor which is fully-compliant with the RISC-V ISA. Its advanced memory subsyst...

6445 0.0

S76 High-performance 64-bit embedded core The SiFive S76 Standard Core is a high-performance 64-bit embedded processor which is fully-compliant with the RISC-V ISA. The S76 is ideal for laten...

6446 0.0

S76 MC Quad-core 64-bit embedded processor The SiFive S76-MC Standard Core is a high-performance 64-bit quad-core embedded processor which is fully-compliant with the RISC-V ISA. The S76-MC is...

6447 0.0

E76-MC Quad-core 32-bit embedded processor The SiFive E76-MC Standard Core is a high-performance quad-core 32-bit embedded processor which is fully-compliant with the RISC-V ISA. Its advanced m...

6448 0.0

M8051EW/W Controller The M8051EW and M8051W microcontroller cores are high performance versions of the popular 8051 8-bit microcontroller. The M8051EW includes an On-Chip ...

6449 0.0

28G LR Multi-Protocol SerDes (MPS) PHY Optimized for power and area, our line-up of SerDes PHYs, deliver maximum performance and flexibility for today's most challenging applications The 2...

6450 0.0

BA22 Cache-Enabled Embedded Processor The BA22-CE is a 32-bit processor for deeply embedded applications that use off-chip instruction and data memories and that may need to run a real-tim...