651 7.0

RSA Keygen IP Core RSA Keygen IP Cores perform key generation in compliance with the RSA Key Pair Generation specifications defined in 'FIPS 186'. This standard specifie...

652 7.0

DSC decoder IP DSC decoder IP is compliant with standard VESA Display Stream Compression version 1.1/1.2/1.2a....

653 7.0

KYBER IP Core Kyber IP is a core designed for Kyber post-quantum Key Encapsulation Mechanism (KEM). It currently supports the Encapsulation and Decapsulation functi...

654 6.0

Camera Demosaicing IP - DAISY (RCCC) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

655 6.0

Camera Demosaicing IP - LOTUS (RCCB) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

656 6.0

Camera Demosaicing IP - ROSE (RGB-IR) The demosaicing is a color filter interpolation method, and refers to an image processing algorithm for restoring full color values of all pixels in a...

657 6.0

Warping Engine IP block for image transformation, HUDs and fish-eye correction TES Warping Engine is a specialized IP core for arbitrary high-performance re-mapping of bitmaps from memory-to-memory or memory-to-stream. Applicatio...

658 6.0

Bluetooth BLE v5.3 PHY Silicon Proven Platinum IP icyTRX is a silicon-proven, ultra-low-power RF transceiver IP designed for Bluetooth Low Energy (BLE), IEEE 802.15.4 (e.g., ZigBee), and proprietary w...

659 6.0

Bluetooth Dual Mode PHY IP V5.4 Silicon Proven The icyTRX-DM is a Bluetooth® 5.4 Dual-Mode RF transceiver IP optimized for ultra-low power wireless communication. It supports both Bluetooth Classic...

660 6.0

DPI video output to system memory capture IP block The Virtual Display IP is designed to enable automated testing of the output of display controllers with DPI-2 output interface such as the TES CDC (C...

661 5.0

M31 ADC / Temp. Sensor IP in 12nm, 14nm, 22nm Process The M31 SAR ADC provides a rich portfolio with a resolution from 10 to 12-bit, maximum speed up to 2.5MSPS, and supports input types of single-ended o...

662 5.0

M31 Digital PLL IP in 3nm, 5nm, 6nm, 7nm, 12nm, 16nm, 22nm,28nm,40nm M31 Digital PLL is a core-power only programmable phase-locked loop (PLL) for frequency synthesis. It supports multiple modes of operation for several...

663 5.0

M31 DisplayPort RX IP in 6/7nm, 22nm M31 DisplayPort RX IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. DisplayPort RX supp...

664 5.0

CAN 2.0, CAN FD - Developed as ISO26262-10 Safety Element out of Context (ISO26262 soft IP SEooC, ASIL-B ready design) Introducing DCD’s Ingenious CAN FD IP Core: Empowering Engineers with Unparalleled Flexibility. When it comes to seamlessly infusing cutting-edge C...

665 5.0

SATA Device IP Core (1.5, 3.0, 6.0 Gbps) The Serial ATA Device Controller IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass storage ...

666 5.0

CCSDS AR4JA LDPC Decoder & Encoder IP Core AR4JA LDPC decoder is a configurable design that allows runtime configuration for decoding different code rates (i.e., 1/2, 2/3 and 3/4). To obtain hi...

667 5.0

DDI Color Enhancement (CLREN) IP BTREE's Color Enhancement IP modifies or emphasizes color by controlling Saturation/Luminance/Hue. BTREE's Color Enhancement can only adjust the color...

668 5.0

DDI High Dynamic Range IP HDR improves the visibility of the output image compared to the input images by increasing the contrast of the image/video reproduced on the display. ...

669 5.0

IEEE802.11n/ac/ax Wi-Fi LDPC Decoder and Encoder IP Core - silicon proven The 802.11n/ac/ax LDPC decoder is developed for high throughput WLAN applications....

670 5.0

SerDes Hard Macro-IP in GlobalFoundries 22FDX Low-power, flexible and robust Serializer-de-serializer IP built upon a proven ring-PLL based architecture, Support for multiple protocols, as well a...

671 5.0

AGILEX 7 R-Tile NVME HOST IP Gen5 NVMe Host IP on AGILEX7 R-Tile It enables random access, sequential access, Read/Write access and multi-user access. To show these features, s...

672 5.0

SHA - DSHA2-256 - SHA IP Core with native SHA2-256 HMAC support The DSHA2-256 is a universal solution which efficiently accelerates SHA2-256 hash function compliant with FIPS PUB 180-4. It computes message digest i...

673 5.0

DiFi IP core The DiFi IP core is a highly scalable and silicon agnostic implementation of the IEEE-ISTO Std 4900-2021: Digital IF Interoperability Standard v1.2.1 ...

674 5.0

Xilinx UltraScale Plus NVME Hhost IP The LDS NVME HOST ZUP IP is one of the most flexible NVME HOST IP in the market. It has been done for beginners and expert in NVMe to drive NVMe PC...

675 5.0

Kintex Ultra Scale Plus NVMe Host IP The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. The LDS NVME HOST IP provides two interfaces : * On...

676 5.0

MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...

677 5.0

MIPI C-PHY v2.0 /D-PHY v2.5 Combo IP MIPI D-PHY is a serial interface technology which is widely adopted in smartphones and other multimedia enabled mobile devices. To further improve thr...

678 5.0

MIPI RFFE Master IP Core The MIPI RFFE Master controller IP is a highly optimized and technology agnostic implementation of the MIPI RFFE v.3.1 standard targeting both ASIC an...

679 5.0

MIPI RFFE Slave IP Core The MIPI RFFE Slave controller IP is a highly optimized and technology and PHY agnostic implementation of the MIPI RFFE v.3.1 standard targeting both ...

680 5.0

MIPI-I3C Combo Host and Target interface controller IP for Sensor and Peripheral connection The MIPI I3C (Improved Inter Integrated circuit) is a two wire bidirectional Serial Bus for sensor communication. The MIPI I3C interface has been ...

681 5.0

MIPI-I3C Combo IP Host/Target HDR-DDR compliance with Spec v1.1.1 MIPI I3C(Improved Inter Integrated Circuit) is a two-wire bidirectional serial Bus for sensors communication. The MIPI I3C interface has been develope...

682 5.0

RISC-V CPU IP With ISO 26262 Full Compliance AndesCore™ N25F is a 32-bit CPU IP core based on AndeStar™ V5 architecture which incorporated RISC-V technology, it is capable of delivering high per-...

683 5.0

DisplayPort TX IP for high-bandwidth applications (6nm, 12nm, 28nm) M31 DisplayPort TX IP provides high-performance, multi-lane capability and low power architecture for high-bandwidth applications. DisplayPort TX supp...

684 5.0

eNOR embedded Flash embedded IP Zhuhai Chuangfeixin’s Floating-gate eNOR Flash memory macro are silicon characterized and qualified on Huali Microelectronics Corporation 65nm Floati...

685 5.0

NOE SAN IP Enabling Remote-Attached Storage on FPGA-Based Embedded Systems over 10G/25G/50G/100G/200G/400GbE The NOE_SAN_IP adopts an open SAN protocol named AT...

686 5.0

Lossless / Near lossless Encoder / Decoder Hardware IP - Lossless / near lossless hardware encoder and decoder IP that features compact and high speed with TMC original algorithm. - Optimized logic gate...

687 5.0

IP Set for Miniaturized Telehealth Wearables HealthIP™ is targeting portable health monitoring (telehealth/telemedicine) and wearable health monitoring devices. The IP set contain analog front-en...

688 5.0

ARINC 429 IP The M429GEN IP implements a synchronous single-chip ARINC 429 Transmit and Receive Controller capable of linking one CPU to one or several ARINC 429 ...

689 5.0

Artix Ultra Scale Plus NVMe Host IP Gen4 The LDS NVME HOST IP has been done for beginners and expert in NVMe to drive NVMe PCIe SSD. - The LDS NVME HOST IP provides two interfaces : o One C...

690 5.0

Cryptographic Cores IP Crypto Quantique’s Cryptographic Cores IP portfolio delivers secure, high-performance implementations of symmetric, asymmetric, and post-quantum algor...

691 5.0

OTP IP Zhuhai Chuangfeixin (CFX) offers two proprietary OTP technologies and respective silicon IPs：One is Anti-fuse, the other is floating gate. CFX OTP ...

692 5.0

OTP One Time Programmable IP HHGrace 55HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

693 5.0

OTP One Time Programmable IP HHGrace 55LP Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

694 5.0

OTP One Time Programmable IP HHGrace 90BCD Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

695 5.0

OTP One Time Programmable IP HLMC 55CIS Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

696 5.0

OTP One Time Programmable IP Nexchip 110HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

697 5.0

OTP One Time Programmable IP Nexchip 110LP2 Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

698 5.0

OTP One Time Programmable IP Nexchip 55HV_6V Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

699 5.0

OTP One Time Programmable IP Samsung 90CIS Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...

700 5.0

OTP One Time Programmable IP SIL130HV Chuangfeixin (CFX)'s OTP IP is adopted in different generations of logic and HV technology (0.18/0.16/0.13/0.11 um and 90/65/55/40/28 nm). The require...